From patchwork Fri Feb 18 09:16:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 12751128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D7602C433F5 for ; Fri, 18 Feb 2022 09:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4PTo8zkcR3ozlUkPZiwBZnfyiFYM1x7cDmrtKnlyz5M=; b=aTmqMNlKh49Wid bB6rC4shlntHcKXtNQNzi9B3MHTCxl+HxbZs9SpvI0Ept10bcKmK8iRmlbSucY0nxZ2mpYrMOlEB/ 16a6KL5KnLW8DMB3RPlTTXkv0zsc6qxL1UzbQ+GiRv2ci6Y4VekirGFSEBYh+frKSBxFuT6PSHi7y Qifb2+UiI3vTCocaM/BY+424xdn+skgSTvK9bHREeR9syJ5CaRGyuPWssn5pFEIH9l6DXDMNFfpcc U+149CFJFJ8cz0aVafh/hEWOshFXYdPAsUHUzSgnBqqBkDjapoleKNnYKnGkPXq9FNLiSz36m8SGv lkveCJlZss+0Ked7YpMg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nKzUA-00DUp5-Tz; Fri, 18 Feb 2022 09:23:31 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nKzR6-00DT2L-KY; Fri, 18 Feb 2022 09:20:22 +0000 X-UUID: 7cc925110451415fb2e35b6cd1a95a6d-20220218 X-UUID: 7cc925110451415fb2e35b6cd1a95a6d-20220218 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 237375591; Fri, 18 Feb 2022 02:20:13 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Feb 2022 01:16:47 -0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 18 Feb 2022 17:16:45 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 18 Feb 2022 17:16:45 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , --to=Krzysztof Kozlowski CC: , , , , , Chen-Yu Tsai , Ryder Lee , Allen-KH Cheng Subject: [PATCH v2 10/23] arm64: dts: mt8192: Add PCIe node Date: Fri, 18 Feb 2022 17:16:20 +0800 Message-ID: <20220218091633.9368-11-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220218091633.9368-1-allen-kh.cheng@mediatek.com> References: <20220218091633.9368-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220218_012020_811282_9996225E X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PCIe node for mt8192 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index a935a22babbb..4533c794effc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -886,6 +886,44 @@ }; }; + pcie: pcie@11230000 { + compatible = "mediatek,mt8192-pcie"; + device_type = "pci"; + reg = <0 0x11230000 0 0x2000>; + reg-names = "pcie-mac"; + #address-cells = <3>; + #size-cells = <2>; + clocks = <&infracfg CLK_INFRA_PCIE_TL_26M>, + <&infracfg CLK_INFRA_PCIE_TL_96M>, + <&infracfg CLK_INFRA_PCIE_TL_32K>, + <&infracfg CLK_INFRA_PCIE_PERI_26M>, + <&infracfg CLK_INFRA_PCIE_TOP_H_133M>, + <&infracfg CLK_INFRA_PCIE_PL_P_250M>; + clock-names = "sys_ck0", "ahb_ck0", "aux_ck0", + "obff_ck0", "axi_ck0", "pipe_ck0"; + assigned-clocks = <&topckgen CLK_TOP_TL_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D6_D4>; + resets = <&infracfg_rst 2>, + <&infracfg_rst 3>; + reset-names = "phy", "mac"; + interrupts = ; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x12000000 0x0 0x12000000 0 0x0800000>, + <0x81000000 0 0x12800000 0x0 0x12800000 0 0x0800000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + nor_flash: spi@11234000 { compatible = "mediatek,mt8192-nor"; reg = <0 0x11234000 0 0xe0>;