From patchwork Sun Feb 20 19:33:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 12752832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8433EC433F5 for ; Sun, 20 Feb 2022 19:36:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q5a41sD52y8e1FlZB8hgEzW1yt9B8UIuGV9oD8cndo4=; b=WeLF4Ssf4nI7w6 cE+iOU3tA4XbO1uSv0L2Rs/L54dnkkZdz8iY6mIsl14Q6x18FwwCltWcWWc6u3rwfuY4+NKHnLYMn CXE9rQTml0IszusQ7iAC7FuO+NG9onZUKwXmS+ooES+W9LL4KRfZ4X0DRKfREcWYBEG+LjunmU58G Z4JIOwvAjOY6/oCJKtDM7php6LfZRhnGkXhX17vL7enIAXTr8Pu1U6gDrtJF3U23ZYIxq1aU3dPcr WaZCYZS7IXGaqvXeJn9YOxmu/6jl7KfuokQR1aIX449RDqEsQRftbo1wV0K7XwtbkWl/0NTKb35Bv V2AEby1v86qfC972iglQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nLrz7-002BcH-SS; Sun, 20 Feb 2022 19:35:06 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nLry8-002B9z-9q for linux-arm-kernel@lists.infradead.org; Sun, 20 Feb 2022 19:34:05 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D6BDC60EBD; Sun, 20 Feb 2022 19:34:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 57A9DC340EB; Sun, 20 Feb 2022 19:34:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645385643; bh=Q7udoEyumIV3Id2yJHB78wnTUYP2itFHIQHmBGa4kZM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ar+RHAJLl2cEgY7Ug7FkARP9pfAWugx9dRQIepRlneW/SSePDMyCbSQXKc7NejXf5 Gkkmp8FLZjfDND9UOP45yyw5lKG0TjJ4QX5NH8Z8CoswwDV5x6WR+N6+EvEi/T1+qJ /vF06O619dqje4eugCsUMLyIMwxNx/y6YtyXsw6QxBKcpFY/Cw6rWxW0CLoslxdnVm Z6cT/lDcoTe9Vk08txt1C7Tn37b944sOEwOsHpWXWk17L5urvOJLMb2l0axO6jUhaP w/FQscc/5tN9khuH+QJoyKsGKRo2Wz7/+w0bSZXmOOGlMJI+a5yBwNPpPJjUeXpLKk 7UwAS2+yST5NA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Lorenzo Pieralisi , Bjorn Helgaas Cc: =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Marc Zyngier , pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Gregory CLEMENT , =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 05/18] PCI: aardvark: Fix reporting Slot capabilities on emulated bridge Date: Sun, 20 Feb 2022 20:33:33 +0100 Message-Id: <20220220193346.23789-6-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220220193346.23789-1-kabel@kernel.org> References: <20220220193346.23789-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220220_113404_453177_A0DA5FD5 X-CRM114-Status: GOOD ( 18.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Pali Rohár Slot capabilities are currently not reported because emulated bridge does not report the PCI_EXP_FLAGS_SLOT flag. Set PCI_EXP_FLAGS_SLOT to let the kernel know that PCI_EXP_SLT* registers are supported. Move setting of PCI_EXP_SLTCTL register from "dynamic" pcie_conf_read function to static buffer as it is only statically filled the PCI_EXP_SLTSTA_PDS flag and dynamic read callback is not needed for this register. Set Presence State Bit to 1 since there is no support for unplugging the card and there is currently no platform able to detect presence of a card - in such a case the bit needs to be set to 1. Finally correctly set Physical Slot Number to 1 since there is only one port and zero value is reserved for ports within the same silicon as Root Port which is not our case for Aardvark HW. Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 31 +++++++++++++++++++-------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 01dd530e1b5f..c80c78505bfa 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -859,14 +859,11 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, switch (reg) { - case PCI_EXP_SLTCTL: - *value = PCI_EXP_SLTSTA_PDS << 16; - return PCI_BRIDGE_EMUL_HANDLED; - /* - * PCI_EXP_RTCTL and PCI_EXP_RTSTA are also supported, but do not need - * to be handled here, because their values are stored in emulated - * config space buffer, and we read them from there when needed. + * PCI_EXP_SLTCAP, PCI_EXP_SLTCTL, PCI_EXP_RTCTL and PCI_EXP_RTSTA are + * also supported, but do not need to be handled here, because their + * values are stored in emulated config space buffer, and we read them + * from there when needed. */ case PCI_EXP_LNKCAP: { @@ -1055,8 +1052,24 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) /* Support interrupt A for MSI feature */ bridge->conf.intpin = PCI_INTERRUPT_INTA; - /* Aardvark HW provides PCIe Capability structure in version 2 */ - bridge->pcie_conf.cap = cpu_to_le16(2); + /* + * Aardvark HW provides PCIe Capability structure in version 2 and + * indicate slot support, which is emulated. + */ + bridge->pcie_conf.cap = cpu_to_le16(2 | PCI_EXP_FLAGS_SLOT); + + /* + * Set Presence Detect State bit permanently since there is no support + * for unplugging the card nor detecting whether it is plugged. (If a + * platform exists in the future that supports it, via a GPIO for + * example, it should be implemented via this bit.) + * + * Set physical slot number to 1 since there is only one port and zero + * value is reserved for ports within the same silicon as Root Port + * which is not our case. + */ + bridge->pcie_conf.slotcap = cpu_to_le32(1 << PCI_EXP_SLTCAP_PSN_SHIFT); + bridge->pcie_conf.slotsta = cpu_to_le16(PCI_EXP_SLTSTA_PDS); /* Indicates supports for Completion Retry Status */ bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);