From patchwork Sat Feb 26 18:41:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12761433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7724C433F5 for ; Sat, 26 Feb 2022 18:45:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LR7XpZ+b7s0cxHrpt/mI0jSO+FgC+7/8mQBM6tbLck4=; b=Mp28a8G9r3RkzO GQoeCA0JPs90UtrEYP8amtLYuwQc2JXYGLt2XxqCjvi8/a2I9rdC/SPZDhnHZ8/Z5a2UIY0eLrKTX YwOOEPR/D4cdvsCbmgGE9K1I+biRmO7z76aalLaVDHA0ZN5W2Qf3wJvVr6zCgiEEqXzM22ySYlRh7 jrwTx0I+G+v74uXExx9nt5Z5bJzKRcfI9oYDnzAxtFqwpACY41t3jAPWn8CIO5JrhHu3egIKRxJAn AK4LKND3aLa6X+/v8/vVLfpTX/nI7ptMHMHO5JKQqHBQAW4crx29Ii4pJ+JR17bP/6DsYc0Y6wGio 4a3Rs4CnLJ5y+YRaizXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nO22p-008OH4-KO; Sat, 26 Feb 2022 18:43:51 +0000 Received: from mail-qk1-x730.google.com ([2607:f8b0:4864:20::730]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nO216-008NCB-3U; Sat, 26 Feb 2022 18:42:05 +0000 Received: by mail-qk1-x730.google.com with SMTP id b13so7267445qkj.12; Sat, 26 Feb 2022 10:42:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+yaSPMv2BtTagOAgtoROuKpbWEg+BWczZUb9gWsIWmQ=; b=BVjrRY4QdbPPVa/Ga31edyLqzJzVSRBZ28F7XLB7y6Gk6CATF0wxHqpRU3nVZ6NF7V LnMHKhwePZAMceonFeKhATrlVWuWUBZfjLSE7N20V7gWtt1zcO+mDe72LH3lwNEBbKQY N2/6U25mo+mc43OVUIUspNEzEkFsKcVADNpsQqLY8Nvzk6uaevaSkWsoaOwx5XrBa5J0 4SCff6KsPKaqq4Sv3wJ8sYmAF/vaT0LK2u+Bcvp0WA/9oIgxxjR8Fa/zFXKaUXdWRdw5 cStKDWRkIHOjYtCQ6Ro1hgub2FUfFOH9PoHmAvT/9abU16GflTVzezkNL7n3V0UVIjE4 4XtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+yaSPMv2BtTagOAgtoROuKpbWEg+BWczZUb9gWsIWmQ=; b=FD/lGwvO9x7Y64eRyKjjkupvBHsTlndtfOP7oqqjnA7Ioht6FH3BjGBoVXhOaDmuO3 H3uQ5gB/TDD7yyWe5ES7ihRi8JNYIEEOSBSIHBn3AuYcHv4boloColZ4BneBF/QjoNyU qUR3S+jwDC2jBbr/gqdZRTmntlohcE0qgQR6nlKmyOEtxj6tUw6e2v1kL5Ngve+7CiRF pGLxyDBO4jmhctYaTSxlyAVCZUEGc1oXigXkHv0C9U7ccLahKbuwmDKpnXeDaYkUuBFy qedFsVdZGQG6la+Lo+PUChdyE6pBRCotEI4f9HSbbOhv2tClzQGawKUA8V8u0ZgG44vK VjIA== X-Gm-Message-State: AOAM533GPtotynK7DItQVJLK+qSmbzbDLE/HGo5RFZ/PLpmcst0rBhim WtVrRB0iaCM6Xr2zIeqpfac= X-Google-Smtp-Source: ABdhPJxewpoNGnB1rqTP28hOGbYOWjPjsdtQGZvo3lr/QpabuOPsc6HW6Lb+sChdKhTzKY5BV6xDow== X-Received: by 2002:a37:bb47:0:b0:506:993b:92f8 with SMTP id l68-20020a37bb47000000b00506993b92f8mr7843746qkf.57.1645900923275; Sat, 26 Feb 2022 10:42:03 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id p68-20020a378d47000000b006491d2d1450sm2891983qkd.10.2022.02.26.10.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Feb 2022 10:42:03 -0800 (PST) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, michael.riesch@wolfvision.net, Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/11] arm64: dts: rockchip: add rk356x dwc3 usb3 nodes Date: Sat, 26 Feb 2022 13:41:45 -0500 Message-Id: <20220226184147.769964-10-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220226184147.769964-1-pgwipeout@gmail.com> References: <20220226184147.769964-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220226_104204_202954_5B9BA818 X-CRM114-Status: GOOD ( 12.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the dwc3 device nodes to the rk356x device trees. The rk3566 has one usb2 capable dwc3 otg controller and one usb3 capable dwc3 host controller. The rk3568 has one usb3 capable dwc3 otg controller and one usb3 capable dwc3 host controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3566.dtsi | 12 +++++++ arch/arm64/boot/dts/rockchip/rk3568.dtsi | 9 +++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 45 +++++++++++++++++++++++- 3 files changed, 65 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi index 3839eef5e4f7..a57eb68faba2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi @@ -6,6 +6,10 @@ / { compatible = "rockchip,rk3566"; }; +&pipegrf { + compatible = "rockchip,rk3566-pipe-grf", "syscon"; +}; + &power { power-domain@RK3568_PD_PIPE { reg = ; @@ -18,3 +22,11 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + +&usb_host0_xhci { + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + extcon = <&usb2phy0>; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 5b0f528d6818..8ba9334f9753 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -99,6 +99,10 @@ opp-1992000000 { }; }; +&pipegrf { + compatible = "rockchip,rk3568-pipe-grf", "syscon"; +}; + &power { power-domain@RK3568_PD_PIPE { reg = ; @@ -114,3 +118,8 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + +&usb_host0_xhci { + phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 7cdef800cb3c..b22e5a514ad7 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -230,6 +230,50 @@ scmi_shmem: sram@0 { }; }; + usb_host0_xhci: usb@fcc00000 { + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; + reg = <0x0 0xfcc00000 0x0 0x400000>; + interrupts = ; + clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, + <&cru ACLK_USB3OTG0>; + clock-names = "ref_clk", "suspend_clk", + "bus_clk"; + dr_mode = "host"; + phy_type = "utmi_wide"; + power-domains = <&power RK3568_PD_PIPE>; + resets = <&cru SRST_USB3OTG0>; + reset-names = "usb3-otg"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,xhci-trb-ent-quirk; + status = "disabled"; + }; + + usb_host1_xhci: usb@fd000000 { + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; + reg = <0x0 0xfd000000 0x0 0x400000>; + interrupts = ; + clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, + <&cru ACLK_USB3OTG1>; + clock-names = "ref_clk", "suspend_clk", + "bus_clk"; + dr_mode = "host"; + phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi_wide"; + power-domains = <&power RK3568_PD_PIPE>; + resets = <&cru SRST_USB3OTG1>; + reset-names = "usb3-otg"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis_u2_susphy_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + status = "disabled"; + }; + gic: interrupt-controller@fd400000 { compatible = "arm,gic-v3"; reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ @@ -297,7 +341,6 @@ pmu_io_domains: io-domains { }; pipegrf: syscon@fdc50000 { - compatible = "rockchip,rk3568-pipe-grf", "syscon"; reg = <0x0 0xfdc50000 0x0 0x1000>; };