From patchwork Sun Feb 27 18:28:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 12762080 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3AF4C433EF for ; Sun, 27 Feb 2022 18:30:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7nmqXyMlOoZRJZbdraRB8ZrnuuLDWVnUNYwAcg63xd8=; b=SbmeDZ6qk60GYM JsK2NcSvLOTNMxKR7ffmy/nSK8lMRLUmZrj2jPF/rRfovs2Sz8Woaxe4sukHsSxM02n6UNsEh6yt5 VzW8zXKtmm/Mh5kkCtRq7AAeLhzRhQmyGDcEFLBAPVlNEtXWCpurqYyhvWlXy9fjBn2UTGOQSU6fs 30sE2haTUQ1udAM73+NWtUaXpXEpr/g4lnn6SZYxX+599lP2AEEZbMXn1JHKnDJNxEvVJbkInVc18 qTpESiYSg4t+J+D+s+Zrl88lbXlWgc+YCceQh+x7Uj6kE2vMh7wYR+6xI12bacexbWAlhI2kHogc/ +EXUsSfZ3Zw73FDSKUMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nOOHs-009wiD-Lf; Sun, 27 Feb 2022 18:28:52 +0000 Received: from mxout1.routing.net ([2a03:2900:1:a::a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nOOHT-009wXq-Uu; Sun, 27 Feb 2022 18:28:30 +0000 Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout1.routing.net (Postfix) with ESMTP id A7DBB4013B; Sun, 27 Feb 2022 18:28:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1645986502; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0xLcegYYoVjPeAY4Eq9m0ZZ+KHV0zGkTbYObM28HdIw=; b=r5y1cZtFYgJCq8Ynl9cOib4u03jqoHGOxha2dubGvYEYy6hloM32ODKNuFJZh310rN7VFo BrppjbdWXFPK8Dz1V7NjUeI6cH0Wbyw612un5SN2jPD6TsSAaOYQxMiGgwuKzTExcSVVmV g6r+KRSSDzCAFASb9EQoNhhY+n8/9bQ= Received: from localhost.localdomain (fttx-pool-80.245.76.205.bambit.de [80.245.76.205]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id EEDDA405AF; Sun, 27 Feb 2022 18:28:21 +0000 (UTC) From: Frank Wunderlich To: "devicetree @ vger . kernel . org Damien Le Moal" , Rob Herring , Krzysztof Kozlowski , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, Heiko Stuebner , Peter Geis , Michael Riesch , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Cc: Frank Wunderlich Subject: [PATCH v3 3/3] arm64: dts: rockchip: Add sata nodes to rk356x Date: Sun, 27 Feb 2022 19:28:00 +0100 Message-Id: <20220227182800.275572-4-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220227182800.275572-1-linux@fw-web.de> References: <20220227182800.275572-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: fc5c7eba-beac-4129-b3e2-d00c639c3d91 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220227_102828_210628_ED9076A8 X-CRM114-Status: GOOD ( 10.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Frank Wunderlich RK356x supports up to 3 sata controllers which were compatible with the existing snps,dwc-ahci binding. Signed-off-by: Frank Wunderlich --- changes in v3: - fix combphy error by moving sata0 to rk3568.dtsi - remove clock-names and interrupt-names changes in v2: - added sata0 + 1, but have only tested sata2 --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 +++++++++++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 26 ++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 5b0f528d6818..2a2f65899d47 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -8,6 +8,19 @@ / { compatible = "rockchip,rk3568"; + sata0: sata@fc000000 { + compatible = "snps,dwc-ahci"; + reg = <0 0xfc000000 0 0x1000>; + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, + <&cru CLK_SATA0_RXOOB>; + interrupts = ; + phys = <&combphy0 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + pipe_phy_grf0: syscon@fdc70000 { compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; reg = <0x0 0xfdc70000 0x0 0x1000>; @@ -114,3 +127,4 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 7cdef800cb3c..484c5ace718a 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -230,6 +230,32 @@ scmi_shmem: sram@0 { }; }; + sata1: sata@fc400000 { + compatible = "snps,dwc-ahci"; + reg = <0 0xfc400000 0 0x1000>; + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, + <&cru CLK_SATA1_RXOOB>; + interrupts = ; + phys = <&combphy1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + + sata2: sata@fc800000 { + compatible = "snps,dwc-ahci"; + reg = <0 0xfc800000 0 0x1000>; + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, + <&cru CLK_SATA2_RXOOB>; + interrupts = ; + phys = <&combphy2 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + gic: interrupt-controller@fd400000 { compatible = "arm,gic-v3"; reg = <0x0 0xfd400000 0 0x10000>, /* GICD */