From patchwork Tue Mar 1 15:12:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 12764823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BF1DC433F5 for ; Tue, 1 Mar 2022 15:13:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=vFZtqibEPh/14cW0VUxVL5eO6RVCpkD4ZnN1NcwvHw0=; b=0aC+4Ur5aPLdQ1 Vk+jkHfraV6QzsvMgMYwjKq8rJK6yEAvrK+p1zFJpL4YxEQwvesi557GZBQEUK8FwhVeVKpCk8etD 9Te0SknYnTfOk+AWlJfuAFDTkplptctik5xacmPTHlMP4jplrEuW3v2B8uPgm8fxhm9EFYUBf9BcT TX2uryHl22bo83ZBbhIekJEEkT6kGpBMRrnSLwmL8pX2Bgs6L0BKO7uBW/bLlGe9tVP3dWloDfwUk d/k5qOXKV7ToIq1tPFak/i8x//suHtVDHQzJP7hRwzbjQsI2MlpyVk9y9Fvb1d5nNV0aez/6Ow/aI i2ZFjPSDoOpE/pPGfWqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nP4BJ-00HDo4-F8; Tue, 01 Mar 2022 15:12:53 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nP4BE-00HDmv-KQ for linux-arm-kernel@lists.infradead.org; Tue, 01 Mar 2022 15:12:49 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9C2176159A; Tue, 1 Mar 2022 15:12:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D9F4C340EE; Tue, 1 Mar 2022 15:12:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646147567; bh=GyjjD91vPuWdWscSVVh/zCuby7hN5ZCrrAUfBrABcn4=; h=From:To:Cc:Subject:Date:From; b=WGazsvscskDYNDnn0WGiyX453JC4IT9FV54Vv0fMPU3JmshPS+15GHofOz3b3nURV EvXULlGmliWR47CmAN2xpJX2SWzMBd2Zilpe5RKgxAIDmUWefI+p3DpRmp3vE8SSEZ y1hmx1unNYL+JOf7KLF/tus4hTzC1YMRp2VyWzVYzOdVW+hLc2ZsNL3bdSiFwSmkWA 8oz9IRhqvMrA3miZCqzryBhpZz3Gh6N5P8RI1/tiCFw+UT2nI1tQdefDpVoDX4+lX0 orp9ke9Oj5uEWT68jJ5fgkd8awX6cZVDODlPg4ge/PfLDF13o+zFdAxxyQZrBeP+Xb KlD1+bQK0U1vQ== From: Dinh Nguyen To: robh+dt@kernel.org, mark.rutland@arm.com Cc: dinguyen@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: dts: n5x: add sdr edac support Date: Tue, 1 Mar 2022 09:12:38 -0600 Message-Id: <20220301151238.15836-1-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220301_071248_760750_7B403140 X-CRM114-Status: GOOD ( 12.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The N5X platform has the Synopsys DDR controller the includes an EDAC controller. Add the entry for the controller in the DTS file instead of the base Agilex DTSI because the base Agilex does not have the controller. Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index f3c1310dae0a..628c9943914b 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -23,6 +23,16 @@ memory { /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; + + soc { + sdram_edac: sdr_edac@f87f8000 { + compatible = "snps,ddrc-3.80a"; + reg = <0xf87f8000 0x400>; + interrupts = <0 175 4>; + intel,sysmgr-syscon = <&sysmgr 0xb8>; + status = "okay"; + }; + }; }; &clkmgr {