From patchwork Thu Mar 3 16:03:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12767725 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 869F2C433EF for ; Thu, 3 Mar 2022 16:12:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OkYUuIBUnMzN4e0JluNIrrYp24TUJglP+Xrw6eQ8fFU=; b=dOs184nJYhFzVz inZrYtnwsn+y8FEU1c6JYq5bIV09Fe4awWEfTkKW2ovaOj/4FC7Ku2Vi0S/Z4pjqwZ6oUiRlhlkqW QXpIzm5A36rtSNuIA1oreXvUCHUBi17DVT4dhewJ79QH1g1URU8m9qCfNmS+Hz/XhdZCgW5rHba33 V1Vfma/aW7baOMyK1XHpmnt4ovJ8kYy+j9aC0AtSDUWx2ndjeckZFz7taxhMq4nH7tkmK0k4tGpLV evux/T2fbJ27picMRDscjv4z38PJXobSG/7A1qhiLVxsif7shB+/ILmtQ5N3RGb6jqV27zgiYklBH a0zIQXc1mSTaTrwEmC6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPo2S-0073jK-Se; Thu, 03 Mar 2022 16:10:49 +0000 Received: from ssl.serverraum.org ([2a01:4f8:151:8464::1:2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPnvZ-0071Gc-5s for linux-arm-kernel@lists.infradead.org; Thu, 03 Mar 2022 16:03:44 +0000 Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 12757223EF; Thu, 3 Mar 2022 17:03:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646323419; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+EPUuD0gT2UnTi7nbEdSvISQThsVfNgCE2QHLS2TQEo=; b=LHdq38nKonSoGipiSnkOwbOLc81hbbgQBZJGqcimN7Ad/gYSZlmnyCX4uYJQjc3HAhVH22 tgnIttnEWLW4H86Rt6Rr95lU2LTjbcgCg/g2P1gYcEcMUCX3XdLiUB6UDovVCiKT/QHUOT 5P5MBROmIudL03StmmlvzLt4dwJFpp4= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v1 3/6] ARM: dts: lan966x: add all flexcom usart nodes Date: Thu, 3 Mar 2022 17:03:20 +0100 Message-Id: <20220303160323.3316317-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220303160323.3316317-1-michael@walle.cc> References: <20220303160323.3316317-1-michael@walle.cc> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220303_080341_421172_52961401 X-CRM114-Status: GOOD ( 10.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add all the usart nodes for the flexcom block. There was already an usart node for the flexcom3 block. But it missed the DMA channels. Although the DMA channels are specified, DMA is not enabled by default because break detection doesn't work with DMA. Keep the nodes disabled by default. Signed-off-by: Michael Walle --- arch/arm/boot/dts/lan966x.dtsi | 55 ++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index a7d46a2ca058..bea69b6d2749 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -92,6 +92,19 @@ flx0: flexcom@e0040000 { #size-cells = <1>; ranges = <0x0 0xe0040000 0x800>; status = "disabled"; + + usart0: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; flx1: flexcom@e0044000 { @@ -102,6 +115,19 @@ flx1: flexcom@e0044000 { #size-cells = <1>; ranges = <0x0 0xe0044000 0x800>; status = "disabled"; + + usart1: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; trng: rng@e0048000 { @@ -129,6 +155,19 @@ flx2: flexcom@e0060000 { #size-cells = <1>; ranges = <0x0 0xe0060000 0x800>; status = "disabled"; + + usart2: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; flx3: flexcom@e0064000 { @@ -144,6 +183,9 @@ usart3: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names = "tx", "rx"; clocks = <&nic_clk>; clock-names = "usart"; atmel,fifo-size = <32>; @@ -178,6 +220,19 @@ flx4: flexcom@e0070000 { #size-cells = <1>; ranges = <0x0 0xe0070000 0x800>; status = "disabled"; + + usart4: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; timer0: timer@e008c000 {