From patchwork Fri Mar 4 13:08:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 12769121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E86AC433F5 for ; Fri, 4 Mar 2022 13:29:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MvFlFhsWQTsUY6RYcBlG6nAg/Wtb20yeejzvx31sX6k=; b=WaSkc5zBbyz57R Is61lZeJCATkHOcqYbE0bIMEMTIpaRvkaaLqyTkly/Af2swji7EVexaM8UTj9V/V+1gDIm+W5/DFj y3mK/zr3vGS/5tlgS7DSQnlccSOivFfftPrGKDB2Zw5qMCY/HfX7EfgV8TBoWHxShA4mLCjmoFiB4 gPoBxUE9RV4c4RW6O6TN+B+tottLckkK2u3JWSYbAKdLFduhOVlS1yFDGQ5ILYR0odfAHU/Gg27M9 JYpoXbD6tsny58oTwRpO+v3OUZ1xR0YF0QZHCQX2dVrxlRIDempZ301acYzWn4XLcGSi1sCaa6UU3 NZbteVjSTkjWbNiIT7pA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ7yu-00ADIZ-Uy; Fri, 04 Mar 2022 13:28:29 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ7pI-00A93G-Nc; Fri, 04 Mar 2022 13:18:34 +0000 X-UUID: a2bc2a6fc76a45618479edc0cc5bd230-20220304 X-UUID: a2bc2a6fc76a45618479edc0cc5bd230-20220304 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 801075287; Fri, 04 Mar 2022 06:18:25 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Mar 2022 05:08:30 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Mar 2022 21:08:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Mar 2022 21:08:28 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , Ryder Lee , Hui Liu , Allen-KH Cheng Subject: [PATCH v3 17/21] arm64: dts: mt8192: Add dpi node Date: Fri, 4 Mar 2022 21:08:05 +0800 Message-ID: <20220304130809.12924-18-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> References: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_051832_794438_436B14FB X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add dpi node for mt8192 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 5fd1fed354d0..039aba7ac0e2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1236,6 +1236,17 @@ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>; }; + dpi0: dpi@14016000 { + compatible = "mediatek,mt8192-dpi"; + reg = <0 0x14016000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DPI_DPI0>, + <&mmsys CLK_MM_DISP_DPI0>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + status = "disabled"; + }; + iommu0: m4u@1401d000 { compatible = "mediatek,mt8192-m4u"; reg = <0 0x1401d000 0 0x1000>;