From patchwork Fri Mar 4 13:07:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 12769084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C299C433F5 for ; Fri, 4 Mar 2022 13:14:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4oKoM7qzRLt5WJpMK8Vtt6BKIhmV6hv3m4Xnetjch38=; b=T1XZuJJE4t1quO tbBlTF9PsCA7thcvRR1y6QSidrEsVH7K6a5fsiPYhVA2yNShRR9kxO5XLPgJvhL7aleTS/Axg5up9 DI5Vq0dRySPVtN12KOzndgaeI6ecuHkt6whIIVIrna3KA/VnVP4yEnA9HqlGyqu1SnBuMWPxq8hI5 bmNJd8oUj3SfG9htMwukQHv4ueocw53gqo+XOf8YQLSniqSqV9LyzQ5+mWWQAClOTFkj/2n8N81/j JIqz1oUK3wkkdWpQqRysRS7G4oQAzvoKnhJbKq36NJFjyXzB8mHwGcvD/syMA5wgemCkqQkmcfLWf DepwqKD0MBYIFLR/WuGQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ7kN-00A6Uz-S6; Fri, 04 Mar 2022 13:13:28 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ7iO-00A5Px-DO; Fri, 04 Mar 2022 13:11:25 +0000 X-UUID: b75bb1a13c634efbb7e33f32b0424c0f-20220304 X-UUID: b75bb1a13c634efbb7e33f32b0424c0f-20220304 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1297818455; Fri, 04 Mar 2022 06:11:17 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Mar 2022 05:08:21 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 4 Mar 2022 21:08:19 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Mar 2022 21:08:19 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , Chen-Yu Tsai , Ryder Lee , "Hui Liu" , Allen-KH Cheng Subject: [PATCH v3 08/21] arm64: dts: mt8192: Add infracfg_rst node Date: Fri, 4 Mar 2022 21:07:56 +0800 Message-ID: <20220304130809.12924-9-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> References: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_051124_482388_9047C6B0 X-CRM114-Status: GOOD ( 12.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add infracfg_rst node for mt8192 SoC. - Add simple-mfd to allow probing the ti,syscon-reset node. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 40cf6dacca3e..82de1af3f6aa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8192"; @@ -267,10 +268,23 @@ #clock-cells = <1>; }; - infracfg: syscon@10001000 { - compatible = "mediatek,mt8192-infracfg", "syscon"; + infracfg: infracfg@10001000 { + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + + infracfg_rst: reset-controller { + compatible = "ti,syscon-reset"; + #reset-cells = <1>; + + ti,reset-bits = < + 0x120 0 0x124 0 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: lvts_ap */ + 0x730 12 0x734 12 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 1: lvts_mcu */ + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 2: pcie phy */ + 0x730 1 0x734 1 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 3: pcie top */ + 0x150 5 0x154 5 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 4: svs */ + >; + }; }; pericfg: syscon@10003000 {