diff mbox series

[v2,6/7] ARM: dts: lan966x: add flexcom I2C nodes

Message ID 20220304153548.3364480-7-michael@walle.cc (mailing list archive)
State New, archived
Headers show
Series ARM: dts: lan966x: dtsi improvements and KSwitch D10 support | expand

Commit Message

Michael Walle March 4, 2022, 3:35 p.m. UTC 
Add all I2C nodes of the flexcom IP blocks. The driver supports
FIFO, DMA or both combined. But the latter isn't working correctly.
Thus, skip the fifo-size property for now. DMA is doing single byte
reads in this case.

Keep the nodes disabled by default.

Signed-off-by: Michael Walle <michael@walle.cc>
---
 arch/arm/boot/dts/lan966x.dtsi | 65 ++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

Comments

Claudiu Beznea March 30, 2022, 1:26 p.m. UTC | #1 
On 04.03.2022 17:35, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add all I2C nodes of the flexcom IP blocks. The driver supports
> FIFO, DMA or both combined. But the latter isn't working correctly.
> Thus, skip the fifo-size property for now. DMA is doing single byte
> reads in this case.
> 
> Keep the nodes disabled by default.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>


> ---
>  arch/arm/boot/dts/lan966x.dtsi | 65 ++++++++++++++++++++++++++++++++++
>  1 file changed, 65 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index a61d394ad04d..95d58bdca3f0 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -120,6 +120,19 @@ spi0: spi@400 {
>                                 #size-cells = <0>;
>                                 status = "disabled";
>                         };
> +
> +                       i2c0: i2c@600 {
> +                               compatible = "microchip,sam9x60-i2c";
> +                               reg = <0x600 0x200>;
> +                               interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(2)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 flx1: flexcom@e0044000 {
> @@ -158,6 +171,19 @@ spi1: spi@400 {
>                                 #size-cells = <0>;
>                                 status = "disabled";
>                         };
> +
> +                       i2c1: i2c@600 {
> +                               compatible = "microchip,sam9x60-i2c";
> +                               reg = <0x600 0x200>;
> +                               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(4)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 trng: rng@e0048000 {
> @@ -213,6 +239,19 @@ spi2: spi@400 {
>                                 #size-cells = <0>;
>                                 status = "disabled";
>                         };
> +
> +                       i2c2: i2c@600 {
> +                               compatible = "microchip,sam9x60-i2c";
> +                               reg = <0x600 0x200>;
> +                               interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(6)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 flx3: flexcom@e0064000 {
> @@ -251,6 +290,19 @@ spi3: spi@400 {
>                                 #size-cells = <0>;
>                                 status = "disabled";
>                         };
> +
> +                       i2c3: i2c@600 {
> +                               compatible = "microchip,sam9x60-i2c";
> +                               reg = <0x600 0x200>;
> +                               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(8)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 dma0: dma-controller@e0068000 {
> @@ -308,6 +360,19 @@ spi4: spi@400 {
>                                 #size-cells = <0>;
>                                 status = "disabled";
>                         };
> +
> +                       i2c4: i2c@600 {
> +                               compatible = "microchip,sam9x60-i2c";
> +                               reg = <0x600 0x200>;
> +                               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(10)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 timer0: timer@e008c000 {
> --
> 2.30.2
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index a61d394ad04d..95d58bdca3f0 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -120,6 +120,19 @@  spi0: spi@400 {
 				#size-cells = <0>;
 				status = "disabled";
 			};
+
+			i2c0: i2c@600 {
+				compatible = "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(2)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		flx1: flexcom@e0044000 {
@@ -158,6 +171,19 @@  spi1: spi@400 {
 				#size-cells = <0>;
 				status = "disabled";
 			};
+
+			i2c1: i2c@600 {
+				compatible = "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(4)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		trng: rng@e0048000 {
@@ -213,6 +239,19 @@  spi2: spi@400 {
 				#size-cells = <0>;
 				status = "disabled";
 			};
+
+			i2c2: i2c@600 {
+				compatible = "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(6)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		flx3: flexcom@e0064000 {
@@ -251,6 +290,19 @@  spi3: spi@400 {
 				#size-cells = <0>;
 				status = "disabled";
 			};
+
+			i2c3: i2c@600 {
+				compatible = "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(8)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		dma0: dma-controller@e0068000 {
@@ -308,6 +360,19 @@  spi4: spi@400 {
 				#size-cells = <0>;
 				status = "disabled";
 			};
+
+			i2c4: i2c@600 {
+				compatible = "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(10)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		timer0: timer@e008c000 {