From patchwork Wed Mar 16 15:13:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12782859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8754DC433FE for ; Wed, 16 Mar 2022 15:21:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6eXkV+Ov6vNYGH43LD0ogJrTpMZ+v8JiVFM8+L+oVvw=; b=zfu3eupMtH6CtZ UrHOoqXYHK8iybUHRSHfFH2Hzx9NZj6BWF0abd/EhdY4lK8WbkmJ09GiZUqX1iLqOm2fpeZ4CnAni V1iApTEGF//scMiPtEPGDMZfB8+yvUxAYXonGbTfhd8pIr1vpi9zEFCx0/soudUS8kdTT2fcmgHjD EOJYDe87E+KJato6Ucs4qUhldVtVo+ceKGNp/ha7BvyG1ym1OVxiEDtHJUVnJD0jmTqLKf6GleXB7 fXqtQuL9JSBuB43inz3fAY1VM+qES/6/+QOamfwdN3Q47LiuYN5xpwcUIlr+bvo47gSLhLIL08Qnj EtF21zgWz23Qp0gpqo0Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUVR2-00DUa7-6i; Wed, 16 Mar 2022 15:19:36 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUVLI-00DSIx-2L; Wed, 16 Mar 2022 15:13:41 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 94BFB1F4467B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1647443618; bh=enIv65xIz/LQWh/DPBxtnq0kzu+DCLgUdEOM/boND/Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UaGSSGHTUXuSIBvDX1tYy0LMYkYn1J6J2aMsJpf3WeNfdNaELQZ/ni0qsdps+6FAI 7SlYw9+46MqGlHWG4NZF5Ym3Aw4HL4npAlnDwkzeVlwbZJprasBs4OnLAEs7GlvyRv jpcdB5iCcAGcO6GJQn0c0d2O79uywW15olDNAywL3kU3bOJs+0XHtQVRE/GQR0OFUG JRq8O8HiJnbtIDUXdeLhghnAuzGaG4zWDgx2taSgSKlynk1m4GZl2zmnPUdFJXzPUY YEctQcKVNUWHZILp8FYbLPQ12o5E0miMJNR4G0NIA3qWzUl4Xtymh1iAIuIQ9s/u60 t2AgUoUQM0jfg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v1 05/10] arm64: dts: mediatek: asurada: Add ChromeOS EC Date: Wed, 16 Mar 2022 11:13:22 -0400 Message-Id: <20220316151327.564214-6-nfraprado@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220316151327.564214-1-nfraprado@collabora.com> References: <20220316151327.564214-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220316_081340_308400_842140A6 X-CRM114-Status: GOOD ( 10.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for the ChromeOS Embedded Controller present on the Asurada platform. It is connected through the SPI1 bus and offers several functionalities: base detection, PWM controller, I2C tunneling, regulators, Type-C connector management, keyboard and Smart Battery Metrics (SBS). Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8192-asurada.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 3c5b1e475cf6..bd2730ab6266 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -353,6 +353,14 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + cros_ec_int: cros-ec-irq-default-pins { + pins-ec-ap-int-odl { + pinmux = ; + input-enable; + bias-pull-up; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux = , @@ -432,6 +440,74 @@ &spi1 { mediatek,pad-select = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_pins>; + + cros_ec: ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0>; + interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <3000000>; + pinctrl-names = "default"; + pinctrl-0 = <&cros_ec_int>; + + #address-cells = <1>; + #size-cells = <0>; + + base_detection: cbas { + compatible = "google,cros-cbas"; + }; + + cros_ec_pwm: ec-pwm { + compatible = "google,cros-ec-pwm"; + #pwm-cells = <1>; + + status = "disabled"; + }; + + i2c_tunnel: i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + google,remote-bus = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mt6360_ldo3_reg: regulator@0 { + compatible = "google,cros-ec-regulator"; + reg = <0>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + mt6360_ldo5_reg: regulator@1 { + compatible = "google,cros-ec-regulator"; + reg = <1>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + typec { + compatible = "google,cros-ec-typec"; + #address-cells = <1>; + #size-cells = <0>; + + usb_c0: connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + label = "left"; + power-role = "dual"; + data-role = "host"; + try-power-role = "source"; + }; + + usb_c1: connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + label = "right"; + power-role = "dual"; + data-role = "host"; + try-power-role = "source"; + }; + }; + }; }; &spi5 { @@ -446,3 +522,6 @@ &spi5 { &uart0 { status = "okay"; }; + +#include +#include