diff mbox series

arm64: dts: ls1012a: correct the size of dcfg block

Message ID 20220317185941.3650-1-leoyang.li@nxp.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: ls1012a: correct the size of dcfg block | expand

Commit Message

Leo Li March 17, 2022, 6:59 p.m. UTC
Fixes: ba3213602d28 ("arm64: dts: Add support for FSL's LS1012A SoC")

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Shawn Guo April 10, 2022, 1:05 a.m. UTC | #1
On Thu, Mar 17, 2022 at 01:59:37PM -0500, Li Yang wrote:
> Fixes: ba3213602d28 ("arm64: dts: Add support for FSL's LS1012A SoC")

Sorry, I do not take patch with no commit log.  Fixes tag doesn't count.

Shawn

> 
> Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
> Signed-off-by: Li Yang <leoyang.li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index 50a72cda4727..b1ae15547e15 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -282,7 +282,7 @@ sec_mon: sec_mon@1e90000 {
>  		dcfg: dcfg@1ee0000 {
>  			compatible = "fsl,ls1012a-dcfg",
>  				     "syscon";
> -			reg = <0x0 0x1ee0000 0x0 0x10000>;
> +			reg = <0x0 0x1ee0000 0x0 0x1000>;
>  			big-endian;
>  		};
>  
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 50a72cda4727..b1ae15547e15 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -282,7 +282,7 @@  sec_mon: sec_mon@1e90000 {
 		dcfg: dcfg@1ee0000 {
 			compatible = "fsl,ls1012a-dcfg",
 				     "syscon";
-			reg = <0x0 0x1ee0000 0x0 0x10000>;
+			reg = <0x0 0x1ee0000 0x0 0x1000>;
 			big-endian;
 		};