From patchwork Fri Mar 18 14:45:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 12785397 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AF7DC433F5 for ; Fri, 18 Mar 2022 15:03:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MzFI4Em90Q4h87fKuTryogxLSATplzafywmwH+nwqVg=; b=uLrBof1ojPYAHM wz7ItC8zRQCRvNIyz2Jq7HTwMGaobtlTtq57iQpli3bqSULo1J5NLrmxI0nA9zJM0lbzTYKc+OG87 KxsAeNNPZ/huWIy2popX9r7LEmqAWTbDCTFU2guorlXQwcNvCZoKB0dzvoTx+u/J/Qt7POGBekg/3 SnO+w3NVTy6PI9JpLap1kbr3NYkL4D0mydZK6SNECkJA/ZGP/Ew7amLuX6rREr7AAnSVjroElfL7z e5QkNNr5hiQJ73fBBSPdl3lVAz/c84+6/Bqo0yEfAATniDF5lbanC1W4MmDZNMG4pFKjmCBa4Sgbs b1mrydO5uM9W4yMD5Nnw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nVE7W-0029pj-FG; Fri, 18 Mar 2022 15:02:27 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nVE1N-0026Wl-KW; Fri, 18 Mar 2022 14:56:07 +0000 X-UUID: c6d5b75a43b64a8a96cd11a87bbd952a-20220318 X-UUID: c6d5b75a43b64a8a96cd11a87bbd952a-20220318 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1323020028; Fri, 18 Mar 2022 07:55:49 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Mar 2022 07:45:58 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Mar 2022 22:45:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 18 Mar 2022 22:45:56 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , Ryder Lee , Hui Liu , Allen-KH Cheng Subject: [PATCH v4 19/22] arm64: dts: mt8192: Add the mmsys reset bit to reset the dsi0 Date: Fri, 18 Mar 2022 22:45:31 +0800 Message-ID: <20220318144534.17996-20-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220318144534.17996-1-allen-kh.cheng@mediatek.com> References: <20220318144534.17996-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220318_075605_717087_5726AA40 X-CRM114-Status: GOOD ( 11.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel. Signed-off-by: Allen-KH Cheng Acked-by: Rob Herring Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- include/dt-bindings/reset/mt8192-resets.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/reset/mt8192-resets.h b/include/dt-bindings/reset/mt8192-resets.h index be9a7ca245b9..764ca9910fa9 100644 --- a/include/dt-bindings/reset/mt8192-resets.h +++ b/include/dt-bindings/reset/mt8192-resets.h @@ -27,4 +27,7 @@ #define MT8192_TOPRGU_SW_RST_NUM 23 +/* MMSYS resets */ +#define MT8192_MMSYS_SW0_RST_B_DISP_DSI0 15 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */