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Mon, 21 Mar 2022 10:55:08 -0500 From: Bryan Brattlof To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Rob Herring , Krzysztof Kozlowski , , , , Bryan Brattlof Subject: [RFC] arm64: dts: ti: introduce a minimal am642 device tree Date: Mon, 21 Mar 2022 10:54:17 -0500 Message-ID: <20220321155417.13267-1-bb@ti.com> X-Mailer: git-send-email 2.17.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=6873; h=from:subject; bh=oanxEdU+tNjntH3wxOh1eBfuSPzLaaPbreW2/Ze55jA=; b=owEBbQGS/pANAwAKAcD4q9PiE9cMAcsmYgBiOJ+ofluqr4YYv5vWFlNjuYxtXkS4QnRrQ+yFeCWd NBjDYaOJATMEAAEKAB0WIQT86LDvkHWcjT+1Kb7A+KvT4hPXDAUCYjifqAAKCRDA+KvT4hPXDBI3B/ 4hXK0N5ac1z15Iw9Es3g3mJw8qgmQFRP2ftELRC8yhQrJ2WyRdcfQhBoeKsf7t3Ebe8b5HZsMpFPOO s5KwgufQnMN3MSAht7q1U0WD3z14Ma5T1IQAns5ebcPekOTdV1zLJZwsmzTN8TsZqlt40U3/+orwnJ HI7G3rWasyE3G+NHcsjZU5tCAZt+n6wOZ41KNBUoFH1bybBuMOooEQIv0w4vb46MmjoLMJCwye6I5+ ObftqlEiONyP+fG/9QUSogzWvaXRkhqzluMOozPHj5t7dwgkvPLlEBn6ANCTUqU18VrwqI82VUc644 rIQnVPptH3pI1S/AvQjHt8tzCDKYVo X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220321_085519_254732_A4E25471 X-CRM114-Status: GOOD ( 15.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Texas Instrument's am642 is one of many k3 based, low cost, low power, chips designed to work in a wide range of applications spanning an even wider range of industries that TI is actively developing With its pin-mux and peripheral rich designs, these chips will likely have a multitude of custom device trees that range wildly from one another and (hopefully) guarantee an influx of variants into the kernel in the coming years With overlays no longer a thing, I wanted to ask for opinions on how we can best help integrate these dt files as they begin to be developed I also wanted to introduce a skeletonized (nothing but uart) device tree to give others a good starting point while developing their projects. Let me know what you think :) Signed-off-by: Bryan Brattlof --- .../devicetree/bindings/arm/ti/k3.yaml | 1 + arch/arm64/boot/dts/ti/Makefile | 1 + arch/arm64/boot/dts/ti/k3-am642-skeleton.dts | 335 ++++++++++++++++++ 3 files changed, 337 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am642-skeleton.dts diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 61c6ab4f52e26..e65053d6465bd 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -55,6 +55,7 @@ properties: - description: K3 AM642 SoC items: - enum: + - ti,am642-generic - ti,am642-evm - ti,am642-sk - const: ti,am642 diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 02e5d80344d00..df7bdf087558c 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -19,6 +19,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-skeleton.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am642-skeleton.dts b/arch/arm64/boot/dts/ti/k3-am642-skeleton.dts new file mode 100644 index 0000000000000..2b789c9c25ced --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-skeleton.dts @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * The absolute minimum DTS file needed for an AM642 + */ + +/dts-v1/; + +#include +#include "k3-am642.dtsi" + +/ { + compatible = "ti,am642-generic", "ti,am642"; + model = "Texas Instruments AM642 Generic"; + + chosen { + stdout-path = "serial2:115200n8"; + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; + }; + + cpus { + /delete-node/ cpu@1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x20000000 0x00000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + }; +}; + +/* reserved for mcu firmware */ +&mcu_gpio0 { + status = "reserved"; +}; + +&mcu_i2c0 { + status = "disabled"; +}; + +&mcu_i2c1 { + status = "disabled"; +}; + +&mcu_gpio_intr { + status = "disabled"; +}; + +&mcu_pmx0 { + status = "disabled"; +}; + +&mcu_uart0 { + status = "disabled"; +}; + +&mcu_uart1 { + status = "disabled"; +}; + +&mcu_spi0 { + status = "disabled"; +}; + +&mcu_spi1 { + status = "disabled"; +}; + +/* dmss */ + +&fss { + status = "disabled"; +}; + +&main_mcan0 { + status = "disabled"; +}; + +&main_mcan1 { + status = "disabled"; +}; + +&usbss0 { + status = "disabled"; +}; + +&cpsw3g { + status = "disabled"; +}; + +&main_gpio0 { + status = "disabled"; +}; + +&main_gpio1 { + status = "disabled"; +}; + +&main_i2c0 { + status = "disabled"; +}; + +&main_i2c1 { + status = "disabled"; +}; + +&main_i2c2 { + status = "disabled"; +}; + +&main_i2c3 { + status = "disabled"; +}; + +&icssg0 { + status = "disabled"; +}; + +&icssg1 { + status = "disabled"; +}; + +/* gic500 */ + +&main_gpio_intr { + status = "disabled"; +}; + +&mailbox0_cluster2 { + status = "disabled"; +}; + +&mailbox0_cluster3 { + status = "disabled"; +}; + +&mailbox0_cluster4 { + status = "disabled"; +}; + +&mailbox0_cluster5 { + status = "disabled"; +}; + +&mailbox0_cluster6 { + status = "disabled"; +}; + +&mailbox0_cluster7 { + status = "disabled"; +}; + +&sdhci1 { + status = "disabled"; +}; + +&sdhci0 { + status = "disabled"; +}; + +&pcie0_ep { + status = "disabled"; +}; + +&pcie0_rc { + status = "disabled"; +}; + +×ync_router { + status = "disabled"; +}; + +&main_pmx0 { + /* (optional) for console */ + main_uart0_pins_default: main-uart0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ + AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ + >; + }; +}; + +&epwm0 { + status = "disabled"; +}; + +&epwm1 { + status = "disabled"; +}; + +&epwm2 { + status = "disabled"; +}; + +&epwm3 { + status = "disabled"; +}; + +&epwm4 { + status = "disabled"; +}; + +&epwm5 { + status = "disabled"; +}; + +&epwm6 { + status = "disabled"; +}; + +&epwm7 { + status = "disabled"; +}; + +&epwm8 { + status = "disabled"; +}; + +&ecap0 { + status = "disabled"; +}; + +&ecap1 { + status = "disabled"; +}; + +&ecap2 { + status = "disabled"; +}; + +&main_r5fss0 { + status = "disabled"; +}; + +&main_r5fss1 { + status = "disabled"; +}; + +/* (optional) for console */ +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; +}; + +/* reserved for firmware */ +&main_uart1 { + status = "reserved"; +}; + +&main_uart2 { + status = "disabled"; +}; + +&main_uart3 { + status = "disabled"; +}; + +&main_uart4 { + status = "disabled"; +}; + +&main_uart5 { + status = "disabled"; +}; + +&main_uart6 { + status = "disabled"; +}; + +&main_spi0 { + status = "disabled"; +}; + +&main_spi1 { + status = "disabled"; +}; + +&main_spi2 { + status = "disabled"; +}; + +&main_spi3 { + status = "disabled"; +}; + +&main_spi4 { + status = "disabled"; +}; + +&hwspinlock { + status = "disabled"; +}; + +/* oc_sram */ + +&main_conf { + status = "disabled"; +}; + +/* dmsc */ + +&tscadc0 { + status = "disabled"; +}; + +&serdes_wiz0 { + status = "disabled"; +}; + +/* !cbass_main */ + +/* transceiver1 */ +/* transceiver2 */ + +&serdes_refclk { + status = "disabled"; +}; + +&cluster0 { + /delete-node/ core1; +}; + +&pmu { + status = "disabled"; +};