From patchwork Tue Mar 22 14:39:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 12788668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12582C433EF for ; Tue, 22 Mar 2022 14:53:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Vhu5abobqwdxDhiUedR42zYjpKAcH7KlLCdlQ37Rzhs=; b=PA5t6wPRim+R/Z Zkea6fFAVG+7buokl4e/4r0T72hbu4dWsISORL+MR/C6GhSuDHMnAxjg+SCn9773xXYK+oj+8pKmd nHtYnmBpwl6FzSyK/2xO3+nkKNEkaa/kdvHhC+bCY5nbm0Fec8WPfuH+2I8WIWpQuh66ef15WwdJ6 fy7GZIQYw3UVTaLbetlH3bZ+z6j/eqhAfbgMfXxfDmKAnUJKmAwJ/BkY69ZcGfgNSkcp37yfN4NHj X4TYPrWQknY6r1D8ovI5etgpSt43+iaVUhmJqJK61/nTggU21NWPUX40PrEJ77pjc8GfMGmDqn8YO 4b8gWlMPV6ynX7zbQz0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nWfrg-00BNAT-KE; Tue, 22 Mar 2022 14:52:05 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nWfhp-00BHbB-Eo; Tue, 22 Mar 2022 14:41:55 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 19735B81BB4; Tue, 22 Mar 2022 14:41:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 64140C36AE3; Tue, 22 Mar 2022 14:41:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647960110; bh=UEwTRlZAy4kLlmbBNaeoYiWupFPI5fJMOID0/hv13uY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tkSlmRrY1mxJ+6ucc+vAJL1FrTZyh0/pSA0qI4pFjHebCGD79mvVndG/DWebXnbGr NeZXvcNQDwhbL44r1Wd58uKWA1/bE67G5jTt6xJgzlHJLpvgk43JB3R6PxZS+DCG7H tQBHRz83kP8pVkDv/5DUJBl4saHxk8b9A0jo5Xkc3xU3uvGS2oweFLcbA7JMSkT7dK FluzFWHcrmRACvAYesz+l9G216foqM4pXnWmIKxVIiHFiuCmdQKL+lWzlf0nHr5svY Ns0C1ZScDOs+C47WV/LmaEkN+vghEQoyOcNZZP0cukQAClPGBcTx60gttwq6Q5uEcc gZaMP02H89uuQ== From: guoren@kernel.org To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de, gregkh@linuxfoundation.org, hch@lst.de Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org, linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, heiko@sntech.de, Guo Ren Subject: [PATCH V9 15/20] riscv: compat: Add hw capability check for elf Date: Tue, 22 Mar 2022 22:39:58 +0800 Message-Id: <20220322144003.2357128-16-guoren@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220322144003.2357128-1-guoren@kernel.org> References: <20220322144003.2357128-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220322_074153_816593_BEFAF8D5 X-CRM114-Status: GOOD ( 12.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Guo Ren Detect hardware COMPAT (32bit U-mode) capability in rv64. If not support COMPAT mode in hw, compat_elf_check_arch would return false by compat_binfmt_elf.c Add CLASS to enhance (compat_)elf_check_arch to distinguish 32BIT/64BIT elf. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Tested-by: Heiko Stuebner Cc: Arnd Bergmann Cc: Christoph Hellwig --- arch/riscv/include/asm/elf.h | 6 ++++-- arch/riscv/kernel/process.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index a234656cfb5d..754fdb8cee96 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -33,9 +33,11 @@ /* * This is used to ensure we don't load something for the wrong architecture. */ -#define elf_check_arch(x) ((x)->e_machine == EM_RISCV) +#define elf_check_arch(x) (((x)->e_machine == EM_RISCV) && \ + ((x)->e_ident[EI_CLASS] == ELF_CLASS)) -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV) +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); +#define compat_elf_check_arch compat_elf_check_arch #define CORE_DUMP_USE_REGSET #define ELF_EXEC_PAGESIZE (PAGE_SIZE) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 8c7665481a9f..203fdaa3f9e2 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -83,6 +83,34 @@ void show_regs(struct pt_regs *regs) dump_backtrace(regs, NULL, KERN_DEFAULT); } +#ifdef CONFIG_COMPAT +static bool compat_mode_supported __read_mostly; + +bool compat_elf_check_arch(Elf32_Ehdr *hdr) +{ + return compat_mode_supported && + hdr->e_machine == EM_RISCV && + hdr->e_ident[EI_CLASS] == ELFCLASS32; +} + +static int __init compat_mode_detect(void) +{ + unsigned long tmp = csr_read(CSR_STATUS); + + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); + compat_mode_supported = + (csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32; + + csr_write(CSR_STATUS, tmp); + + pr_info("riscv: ELF compat mode %s", + compat_mode_supported ? "supported" : "failed"); + + return 0; +} +early_initcall(compat_mode_detect); +#endif + void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) {