From patchwork Fri Mar 25 09:38:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12791387 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82812C433F5 for ; Fri, 25 Mar 2022 09:40:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Lk0gKUGDTG9aVh4rw3xWYG2tqA2tW4clzHFg9JrnF4s=; b=kRjIK7r7WlE2qL X43YpjH0nFOtwQcbLqWb5OMCqn3Y3AtxjJnghcfvDvD1h/q5fXpgl7nNVeJq9Hy+C9uuAUA8ZKAE3 MVMk6d4Bz2DHhB8gQuk/IWLFisRvVwyryM3pt4IPFF+IRkOQXzmu7bGvZe7GxUfH42429c6LsxWRE R6yBCQ3RPpGoO1F2haHrbLtxreL6GFyLumD+vD3DGP23Ktmz8q/5gbd1dDhWsKIuvGNe1h7NRL9/a Om+dK9VBjwea48SgFt7rSj55w0MKx5OMH8dVtVF8q2WQHMXk2UHX31xiSoc+OZMm/vU7PVjRXA72n xPLi6ZsnijnR4msI/FQQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nXgPS-001YCP-BX; Fri, 25 Mar 2022 09:39:06 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nXgPD-001Y5l-Q0 for linux-arm-kernel@lists.infradead.org; Fri, 25 Mar 2022 09:38:53 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 41F2660EFC; Fri, 25 Mar 2022 09:38:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5B537C36AE5; Fri, 25 Mar 2022 09:38:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1648201130; bh=WyzaJyUQyLLPbhjjyIyT33MK5yYrbSC3KZcODWg84NU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hhHcM1AjAC4Pn/pHQngAR+Btnpk26U0oWoYT5GE9uO8qoeBX/7Ppr+P+eMCB3D3yI CNgSReADQ3yB2l0KI5J9bqAgQScRbiFIkHFeL9AuqZvEpwyaDUcSlR+ikPpGV7axX/ bvG7UG48KAgc1EbLzN4lfPDfEhtg5gNwHjVhbFQL8S/g0CHYbvxPgFEhtGJBtjIXvp 94xZMbdxabfipvxDklIYcAFls3WkH9ErjHD4bKCiv3/hBD14qycN5D+SSM5OU5caR/ Wz8mEjW7wwA6wkBMzKbFcue2Wxl5LoH9BDUKhnIDJH80CApL5UO/Nnirvw0jHsb2bm mZsC5rmifZj7Q== Received: by pali.im (Postfix) id 06A1FC1E; Fri, 25 Mar 2022 10:38:50 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Andrew Lunn , Thomas Petazzoni , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , =?utf-8?q?Marek_Beh=C3=BAn?= , Russell King Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/4] PCI: Add function for parsing 'slot-power-limit-milliwatt' DT property Date: Fri, 25 Mar 2022 10:38:26 +0100 Message-Id: <20220325093827.4983-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220325093827.4983-1-pali@kernel.org> References: <20220325093827.4983-1-pali@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220325_023851_942445_BBE08264 X-CRM114-Status: GOOD ( 17.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add function of_pci_get_slot_power_limit(), which parses the 'slot-power-limit-milliwatt' DT property, returning the value in milliwatts and in format ready for the PCIe Slot Capabilities Register. Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Reviewed-by: Rob Herring --- Changes in v3: * Set 600 W when DT slot-power-limit-milliwatt > 600 W Changes in v2: * Added support for PCIe 6.0 slot power limit encodings * Round down slot power limit value --- drivers/pci/of.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci.h | 15 +++++++++++ 2 files changed, 79 insertions(+) diff --git a/drivers/pci/of.c b/drivers/pci/of.c index cb2e8351c2cc..5ebff26edd41 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -633,3 +633,67 @@ int of_pci_get_max_link_speed(struct device_node *node) return max_link_speed; } EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed); + +/** + * of_pci_get_slot_power_limit - Parses the "slot-power-limit-milliwatt" + * property. + * + * @node: device tree node with the slot power limit information + * @slot_power_limit_value: pointer where the value should be stored in PCIe + * Slot Capabilities Register format + * @slot_power_limit_scale: pointer where the scale should be stored in PCIe + * Slot Capabilities Register format + * + * Returns the slot power limit in milliwatts and if @slot_power_limit_value + * and @slot_power_limit_scale pointers are non-NULL, fills in the value and + * scale in format used by PCIe Slot Capabilities Register. + * + * If the property is not found or is invalid, returns 0. + */ +u32 of_pci_get_slot_power_limit(struct device_node *node, + u8 *slot_power_limit_value, + u8 *slot_power_limit_scale) +{ + u32 slot_power_limit_mw; + u8 value, scale; + + if (of_property_read_u32(node, "slot-power-limit-milliwatt", + &slot_power_limit_mw)) + slot_power_limit_mw = 0; + + /* Calculate Slot Power Limit Value and Slot Power Limit Scale */ + if (slot_power_limit_mw == 0) { + value = 0x00; + scale = 0; + } else if (slot_power_limit_mw <= 255) { + value = slot_power_limit_mw; + scale = 3; + } else if (slot_power_limit_mw <= 255*10) { + value = slot_power_limit_mw / 10; + scale = 2; + } else if (slot_power_limit_mw <= 255*100) { + value = slot_power_limit_mw / 100; + scale = 1; + } else if (slot_power_limit_mw <= 239*1000) { + value = slot_power_limit_mw / 1000; + scale = 0; + } else if (slot_power_limit_mw <= 250*1000) { + value = 0xF0; + scale = 0; + } else if (slot_power_limit_mw <= 600*1000) { + value = 0xF0 + (slot_power_limit_mw / 1000 - 250) / 25; + scale = 0; + } else { + value = 0xFE; + scale = 0; + } + + if (slot_power_limit_value) + *slot_power_limit_value = value; + + if (slot_power_limit_scale) + *slot_power_limit_scale = scale; + + return slot_power_limit_mw; +} +EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 3d60cabde1a1..e10cdec6c56e 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -627,6 +627,9 @@ struct device_node; int of_pci_parse_bus_range(struct device_node *node, struct resource *res); int of_get_pci_domain_nr(struct device_node *node); int of_pci_get_max_link_speed(struct device_node *node); +u32 of_pci_get_slot_power_limit(struct device_node *node, + u8 *slot_power_limit_value, + u8 *slot_power_limit_scale); void pci_set_of_node(struct pci_dev *dev); void pci_release_of_node(struct pci_dev *dev); void pci_set_bus_of_node(struct pci_bus *bus); @@ -653,6 +656,18 @@ of_pci_get_max_link_speed(struct device_node *node) return -EINVAL; } +static inline u32 +of_pci_get_slot_power_limit(struct device_node *node, + u8 *slot_power_limit_value, + u8 *slot_power_limit_scale) +{ + if (slot_power_limit_value) + *slot_power_limit_value = 0; + if (slot_power_limit_scale) + *slot_power_limit_scale = 0; + return 0; +} + static inline void pci_set_of_node(struct pci_dev *dev) { } static inline void pci_release_of_node(struct pci_dev *dev) { } static inline void pci_set_bus_of_node(struct pci_bus *bus) { }