From patchwork Tue Mar 29 01:13:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 12794363 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94FDCC433F5 for ; Tue, 29 Mar 2022 01:15:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:References: Mime-Version:Message-Id:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=0wZfunbW5koSNMPZWXKLbA92sQld8OrybZCHKSLfVjs=; b=mvOsSiObUBB9D6x0cZ4QdHGACS ClXyuaw3gSsYxiZgmDtqT5AGrvPRFXgVZ/2vEIqSkmvmPk+QdyRt7Lygewx76lI8txQ90+zXgGaqB YPhDsMcmkHS9WvE8BNkZ0aPAeyqvPQ+1SeNLKPG5EMv5OBYfXQbfGGC+VxPlqqA1MXeS3V0Lwk1dC w289Qkmmp33w/XhwBR1SpntqnS8o4IuLb02Bw4S8QJPrxQixQ1C3XQqnUcrsyLQA0aS9ZMjehPL2b dBGZ2AdgbMhu1R5JU7zN3XviObGjPWopda3hzPFMkUpdrj+Z6qa452D6MtpCYA9UlLxLTX/yHLX1+ WN5aXcDg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nZ0QR-00AbdL-2p; Tue, 29 Mar 2022 01:13:35 +0000 Received: from mail-io1-xd49.google.com ([2607:f8b0:4864:20::d49]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nZ0Q5-00AbXt-7T for linux-arm-kernel@lists.infradead.org; Tue, 29 Mar 2022 01:13:15 +0000 Received: by mail-io1-xd49.google.com with SMTP id z16-20020a05660217d000b006461c7cbee3so11405208iox.21 for ; Mon, 28 Mar 2022 18:13:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=FQq173QwTqE1vm53MnjGUP0EAX6a1keGndPoCP0qNcw=; b=pxowAXIpP5cCzv+qqYGhi0KwRqqH7Oz5whjeSHml4XTfSbB3TMoAuyso+QOUOMzArl r2ROzDegAe81hX5m7OEFnHIRPF5gbXbE9TjUIUjTgTDvKxjl7owBoCLbo7TkUt5AR/n7 chQZ6EyPHV5byJ+on1yh6WpGgMsf1XTQgywAT5TN/BNQJsnO9Zw9hN7LqVQI+iHo786I cT0tREPMb7E5bqvW/mbVfmWJz4e6BjIGV/ozdzn2VEjllG/lqPrhQHpSwEiRbjkwaO3r g/3bOlQfQPoYQ/yjOdBOEWZ67FvKQsMQgTAA3ix/qwLxilqrowJaXVXrDUWuOQvW7Zxo Y9YA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=FQq173QwTqE1vm53MnjGUP0EAX6a1keGndPoCP0qNcw=; b=PhH2P92ieay0a7onpI1NogGOq4txXDFOa91KHKvyynU+D6FmfBMHq5lauzv1tXuEYj p6S8D6Bdl1OaK8rfnHYEpwGEi7ggqW/VtB3rkFSQ9/GZ/nALNUJ5tguOUjMShUji3Qge zdeVgK6ymyTjJS/PLAlerqIGn5LS3rIiNXRZYoqw4LgeYDcEJBcwef1WD0ogpyLecqhD zi98E9ZU13QOGZEer8VtoLZ1/zzTOO7v3LBO/uum96l9PzPlerMIBiHsqM537QoGfJ02 iYlMDSH5LUBhs1hFntmeVUiXy7urW88HhCZOoHsjERaoJ51ZCfQ7y143AhfgeUbliFaT 1Qvg== X-Gm-Message-State: AOAM5300fRcA107V0wkTT0PD0bJHO/d8CQefbtv10vuG1w+yMwWDZnJ2 mnY2OoCa2eFZNPFHYjcVBZvm72CQlDY= X-Google-Smtp-Source: ABdhPJxwn5p9L3a3y2OKxHPvrs5F4XlRM25GIQM8EcT9hZl3cZuWipuAOX4zHxJwp2rkASW4XqH/Qx8PIT4= X-Received: from oupton.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:404]) (user=oupton job=sendgmr) by 2002:a05:6602:80a:b0:649:f33:ecb2 with SMTP id z10-20020a056602080a00b006490f33ecb2mr7618020iow.150.1648516391021; Mon, 28 Mar 2022 18:13:11 -0700 (PDT) Date: Tue, 29 Mar 2022 01:13:00 +0000 In-Reply-To: <20220329011301.1166265-1-oupton@google.com> Message-Id: <20220329011301.1166265-3-oupton@google.com> Mime-Version: 1.0 References: <20220329011301.1166265-1-oupton@google.com> X-Mailer: git-send-email 2.35.1.1021.g381101b075-goog Subject: [PATCH 2/3] KVM: arm64: Plumb cp10 ID traps through the AArch64 sysreg handler From: Oliver Upton To: kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, Peter Shier , Ricardo Koller , Reiji Watanabe , Oliver Upton X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_181313_295201_6FE3D74A X-CRM114-Status: GOOD ( 14.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In order to enable HCR_EL2.TID3 for AArch32 guests KVM needs to handle traps where ESR_EL2.EC=0x8, which corresponds to an attempted VMRS access from an ID group register. Specifically, the MVFR{0-2} registers are accessed this way from AArch32. Conveniently, these registers are architecturally mapped to MVFR{0-2}_EL1 in AArch64. Furthermore, KVM already handles reads to these aliases in AArch64. Plumb VMRS read traps through to the general AArch64 system register handler. Signed-off-by: Oliver Upton --- arch/arm64/include/asm/kvm_host.h | 1 + arch/arm64/kvm/handle_exit.c | 1 + arch/arm64/kvm/sys_regs.c | 62 +++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 0e96087885fe..7a65ac268a22 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -673,6 +673,7 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); +int kvm_handle_cp10_id(struct kvm_vcpu *vcpu); void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index 97fe14aab1a3..5088a86ace5b 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -167,6 +167,7 @@ static exit_handle_fn arm_exit_handlers[] = { [ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64, [ESR_ELx_EC_CP14_MR] = kvm_handle_cp14_32, [ESR_ELx_EC_CP14_LS] = kvm_handle_cp14_load_store, + [ESR_ELx_EC_CP10_ID] = kvm_handle_cp10_id, [ESR_ELx_EC_CP14_64] = kvm_handle_cp14_64, [ESR_ELx_EC_HVC32] = handle_hvc, [ESR_ELx_EC_SMC32] = handle_smc, diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 30771f950027..1caac72b0cb0 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2341,6 +2341,68 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu, static int emulate_sys_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *params); +/* + * The CP10 ID registers are architecturally mapped to AArch64 feature + * registers. Abuse that fact so we can rely on the AArch64 handler for accesses + * from AArch32. + */ +static bool kvm_esr_cp10_id_to_sys64(u32 esr, struct sys_reg_params *params) +{ + params->is_write = ((esr & 1) == 0); + params->Op0 = 3; + params->Op1 = 0; + params->CRn = 0; + params->CRm = 3; + + switch ((esr >> 10) & 0xf) { + /* MVFR0 */ + case 0b0111: + params->Op2 = 0; + break; + /* MVFR1 */ + case 0b0110: + params->Op2 = 1; + break; + /* MVFR2 */ + case 0b0101: + params->Op2 = 2; + break; + default: + return false; + } + + return true; +} + +/** + * kvm_handle_cp10_id() - Handles a VMRS trap on guest access to a 'Media and + * VFP Register' from AArch32. + * @vcpu: The vCPU pointer + * + * MVFR{0-2} are architecturally mapped to the AArch64 MVFR{0-2}_EL1 registers. + * Work out the correct AArch64 system register encoding and reroute to the + * AArch64 system register emulation. + */ +int kvm_handle_cp10_id(struct kvm_vcpu *vcpu) +{ + int Rt = kvm_vcpu_sys_get_rt(vcpu); + u32 esr = kvm_vcpu_get_esr(vcpu); + struct sys_reg_params params; + int ret; + + /* UNDEF on any unhandled register or an attempted write */ + if (!kvm_esr_cp10_id_to_sys64(esr, ¶ms) || params.is_write) { + kvm_inject_undefined(vcpu); + return 1; + } + + params.regval = vcpu_get_reg(vcpu, Rt); + ret = emulate_sys_reg(vcpu, ¶ms); + + vcpu_set_reg(vcpu, Rt, params.regval); + return ret; +} + /** * kvm_emulate_cp15_id_reg() - Handles an MRC trap on a guest CP15 access where * CRn=0, which corresponds to the AArch32 feature