From patchwork Sat Apr 2 13:52:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 12799295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B601FC433F5 for ; Sat, 2 Apr 2022 14:14:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Vhu5abobqwdxDhiUedR42zYjpKAcH7KlLCdlQ37Rzhs=; b=j6hQ+Jr6jfaJW0 R554658B0iRU5qFU2xf2yGLDod2zDL6pRpTDMgYt7eMJa/TU7Lfsyip0zh/K3cE5nW6Bdm7ihbQYE ivo7MwQdrjbT/EIxuLH+M1iYUfYIuTHCB76Mi2mPGedRd3jHxNaFTLElGMTOUwr+sKwBtKOrxTEQs MFxrw2JmMiTPPOKVnWUtD1hRofWl2El7al+BhYVDdtQI+o1w+jTRRDr42mC7FadhU7WjuxVhH/Ml0 z1CHoae5mLp3P3c+LoVGnjTEsjXE6epzjSHy6tWKPldE51EuhvWqliNKfbXTEtuQywpqvJ0uABOUG xDj/y25Q33LblIlvWIyg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naeVT-009BZt-4k; Sat, 02 Apr 2022 14:13:35 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naeD0-0092jS-IL; Sat, 02 Apr 2022 13:54:32 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 063A6614CF; Sat, 2 Apr 2022 13:54:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A9101C340EE; Sat, 2 Apr 2022 13:54:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1648907669; bh=UEwTRlZAy4kLlmbBNaeoYiWupFPI5fJMOID0/hv13uY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HjteVl911ufCCl1iUOOI0BynwVkmsWJXZMPYnaE2SfJFjUxfUXgFCkj5mfRnoXuCq Vwgb7FlMpEKKmCeGSGcLJG2atz7HABpe0aOOlDiZLhW966R5e7Cu3qa9vH3JjzPnYb UPiMYvR3Sf/QXJKDgiTklvxt7j3jCrcSJp3rP3JY9hs+etwgpi1T94qSZmb2WJl1K6 TLrwL70/Z5p1zmzmu9uWlkDJnThlIbPV0APsUb+aNO26CrmfGc3+jTL905ptyaVIqv uCAemCT3XUX89nqPt4q/xBlImfVKRHOewpR64KcnF5bh7ToPbmZc0V29wid0+wiZS+ jD7+pD9X4LFrw== From: guoren@kernel.org To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de, gregkh@linuxfoundation.org, hch@lst.de Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org, linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, heiko@sntech.de, Guo Ren Subject: [PATCH V11 15/20] riscv: compat: Add hw capability check for elf Date: Sat, 2 Apr 2022 21:52:51 +0800 Message-Id: <20220402135256.2691868-16-guoren@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220402135256.2691868-1-guoren@kernel.org> References: <20220402135256.2691868-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_065430_773073_AD8923FC X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Guo Ren Detect hardware COMPAT (32bit U-mode) capability in rv64. If not support COMPAT mode in hw, compat_elf_check_arch would return false by compat_binfmt_elf.c Add CLASS to enhance (compat_)elf_check_arch to distinguish 32BIT/64BIT elf. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Tested-by: Heiko Stuebner Cc: Arnd Bergmann Cc: Christoph Hellwig --- arch/riscv/include/asm/elf.h | 6 ++++-- arch/riscv/kernel/process.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index a234656cfb5d..754fdb8cee96 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -33,9 +33,11 @@ /* * This is used to ensure we don't load something for the wrong architecture. */ -#define elf_check_arch(x) ((x)->e_machine == EM_RISCV) +#define elf_check_arch(x) (((x)->e_machine == EM_RISCV) && \ + ((x)->e_ident[EI_CLASS] == ELF_CLASS)) -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV) +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); +#define compat_elf_check_arch compat_elf_check_arch #define CORE_DUMP_USE_REGSET #define ELF_EXEC_PAGESIZE (PAGE_SIZE) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 8c7665481a9f..203fdaa3f9e2 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -83,6 +83,34 @@ void show_regs(struct pt_regs *regs) dump_backtrace(regs, NULL, KERN_DEFAULT); } +#ifdef CONFIG_COMPAT +static bool compat_mode_supported __read_mostly; + +bool compat_elf_check_arch(Elf32_Ehdr *hdr) +{ + return compat_mode_supported && + hdr->e_machine == EM_RISCV && + hdr->e_ident[EI_CLASS] == ELFCLASS32; +} + +static int __init compat_mode_detect(void) +{ + unsigned long tmp = csr_read(CSR_STATUS); + + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); + compat_mode_supported = + (csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32; + + csr_write(CSR_STATUS, tmp); + + pr_info("riscv: ELF compat mode %s", + compat_mode_supported ? "supported" : "failed"); + + return 0; +} +early_initcall(compat_mode_detect); +#endif + void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) {