@@ -745,10 +745,11 @@
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
+ rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
- rockchip,grf = <&grf>;
-
assigned-clocks = <&cru SCLK_RTC32K>;
assigned-clock-rates = <32768>;
};
@@ -758,6 +758,8 @@
cru: clock-controller@ff440000 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff440000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
@@ -747,6 +747,8 @@
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3368-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
@@ -1416,6 +1416,8 @@
pmucru: pmu-clock-controller@ff750000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
rockchip,grf = <&pmugrf>;
#clock-cells = <1>;
#reset-cells = <1>;
@@ -1426,6 +1428,8 @@
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
Add clocks and clock-names to the Rockchip cru node, because the device has to have at least one input clock. With the addition of new properties also sort the node properties a little bit where needed. Signed-off-by: Johan Jonker <jbx6244@gmail.com> --- Changed V4: combine patches --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++-- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++ 4 files changed, 11 insertions(+), 2 deletions(-)