From patchwork Sat Apr 2 14:36:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799358 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B0D4C433EF for ; Sat, 2 Apr 2022 14:43:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rdbzrwd498fbKti3/PEgrdTRA0e/klkIVrBUWDmZ68Y=; b=Do2ChYI1i+PRKA w3eMdXcVLE7ra+0RMxWTxmiWxIIGb5+i1D+APftPkH3zhRQVrF9I/J58X4nfX3w4wBYMrnmrVSY1K sO84f6y1irH6UectC2TZaxHId/McZYnv6Sw+eCkfiN6U7lZ43FnfrmQw0gcTdNnI5I4S0iVHUnOak G0SrcEcr2XG7sGD6Yb8gi8PRPiRzBuYDD+IW/buYHhbcqiu3aThx+7I/6hqVnIrn/uOSz5s2uGlAH 59YtfNXqSSwLH7tYp7osxYVv0iPMAksokaOlFRDVYVFFUxYsIsQnqANhZmLcRlTDtJewOP0UPCr5j Jl+3yGtAiigUn5uAdV4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naex7-009MJj-4M; Sat, 02 Apr 2022 14:42:09 +0000 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesE-009JGU-EB; Sat, 02 Apr 2022 14:37:09 +0000 Received: by mail-ej1-x636.google.com with SMTP id qh7so1398649ejb.11; Sat, 02 Apr 2022 07:36:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gDX6XR3jVDm9yWJ+XzR+YFdJXpUjQXrovXJ8YXoJ/eQ=; b=Gkcp8k95sTeZEk8ouc+Cz0NB5BQTPfw9R9dJ5Q1aGu6JQ4E+2wJuYyFT3PY9hcZcy1 HVvbItxziBvdTE95+7S+Z4pZ7EVz44W+pLxU4OTDCxqpNIEBZ+OpaGTQD1HNSpLI6P9K 1Zo7OY9F1u4i8U4TjwPZwsMrJ8cM9E2yKyba1siqaiw7T7WP5l0kt3v4+ZeQsLYiBqtX xF0ahmQsB6PMLPpxh6VYMBHIEC5UeKJ10JD3WcYU3Gbwbxc68L4HPcDvtKoxc3CmtoM9 lGhlD48L3rczzHKysiYUxi6yEZ5Q8doxOP9MNE773DBjePlQlq5iDvpCzpMvwe/l8OPk eR2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gDX6XR3jVDm9yWJ+XzR+YFdJXpUjQXrovXJ8YXoJ/eQ=; b=Gf1z03bdlptJPMN1yEE1bIJ8FlTwiKYP3nN6tJYkcmh/WJmLWeIFMclJZ5ehZ4UgMp cukV7+Lm3PozsKSHVLV6MxYRNwEiOlpFkXRQ7wQcPF0zo44vgJyeLl6HVkuDk4H1vIJf Udhl+moPR1XflCSSOtdLtMoDwO+kSWGqAy4sVbChPc6CxXM3+ezwfQtJIlO/fCLBfR+Q d1ayXlcOtJsVkhA7eKO8th/QSJ8hEgO2ec2cJHd2Alud2O9FRvK9kNIjAIlnyt5nkY9r q+kY6FzbIN1IUUT9xXQB0+TWXRYDDhI6J04OE30aMrlAUhXze5iDr62IS/XV0IfW1HTX sngg== X-Gm-Message-State: AOAM532r1qE8bOlHersLWkfFx37O1PQg0UlzQ/bqO6y0qGvkJvHhZvNU Y3MeTbLmt+vOYrNIFBEdW7M= X-Google-Smtp-Source: ABdhPJxDsZ0j8m7pCLEC+sxvbQOm35l111ofY5I/W40A9SpsH55KuoLgxiZNEbcTmIxdLc1g3Li69g== X-Received: by 2002:a17:907:6e03:b0:6e0:15ce:77ba with SMTP id sd3-20020a1709076e0300b006e015ce77bamr3988665ejc.67.1648910210153; Sat, 02 Apr 2022 07:36:50 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:49 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 07/16] dt-bindings: clock: convert rockchip, rk3328-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:27 +0200 Message-Id: <20220402143636.15222-8-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073706_564311_EE6F1F13 X-CRM114-Status: GOOD ( 19.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3328-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rk3328-cru.txt | 58 ------------- .../bindings/clock/rockchip,rk3328-cru.yaml | 82 +++++++++++++++++++ 2 files changed, 82 insertions(+), 58 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt deleted file mode 100644 index 904ae682e..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Rockchip RK3328 Clock and Reset Unit - -The RK3328 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3328-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "clkin_i2s" - external I2S clock - optional, - - "gmac_clkin" - external GMAC clock - optional - - "phy_50m_out" - output clock of the pll in the mac phy - - "hdmi_phy" - output clock of the hdmi phy pll - optional - -Example: Clock controller node: - - cru: clock-controller@ff440000 { - compatible = "rockchip,rk3328-cru"; - reg = <0x0 0xff440000 0x0 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@ff120000 { - compatible = "snps,dw-apb-uart"; - reg = <0xff120000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml new file mode 100644 index 000000000..965f67be3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3328-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3328 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3328 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3328-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + items: + enum: + - xin24m + - clkin_i2s + - gmac_clkin + - hdmi_phy + - phy_50m_out + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff440000 { + compatible = "rockchip,rk3328-cru"; + reg = <0xff440000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + };