From patchwork Fri Apr 8 20:03:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalesh Singh X-Patchwork-Id: 12807169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37281C433EF for ; Fri, 8 Apr 2022 20:06:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:From:Subject:References:Mime-Version :Message-Id:In-Reply-To:Date:Reply-To:To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7Kjei0dvErwWOECppemsK8d6V5v26xb050EbmyebR20=; b=ZBqlkQtSM67jP3 eDwTIdLe+svmoIgAh+wNlNTr7wIIQjXqDEy/B4Ilsp9NVN9gxip/Btl+MVi2OkDJT/QTgeS/+e68J O/j5pMrZc6uxw4F53iZbQH/4AKS8alD1hxSJkwojAvWLvJJcdI9+jg0YtTagowrncBl0knAMQH1pU Msmd6xEFYJuPscvbcw+Tadn83kmGwhoOV1TgBMO0LRti161PN7u65KR6mbQ1A0K42FJJ7HFYygkF9 pZNQMis4kPBh2OgWm4M+n5ywNgLcLSzaT+d1H6ZaAzv7Dm1FEc04pmvP6E1sjJ83OUaj60ON4ALz3 I7Rd55zw30c4kK3wr1Wg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncurR-0018Wl-Ee; Fri, 08 Apr 2022 20:05:37 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncurL-0018U9-LX for linux-arm-kernel@lists.infradead.org; Fri, 08 Apr 2022 20:05:35 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-2ebd3bff278so40486957b3.8 for ; Fri, 08 Apr 2022 13:05:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:cc; bh=29m9VxVlX1cygVbwxroxIUp2tBTU4nq34nZ2FiozReE=; b=nUBtx/VHP2Ru1W903kJ1uH9fsTWHYrvlrk43uEvSrOUU8HseqVNL2SYQIi710T8ljb aYibGOQhj+PCP3vWdV30uKckypkUslNCAcXRsvrlANH0jurvO8/B6/BwhwRxWCB8Zmmm hG+B7YA2puFsn7Vd/oT9bPbN8OnqMwMQ0aynYGDQP+ikL48lOxOXeMSGaoP72HQCdhjU LjpmVYxi7G6FNtjwN396olmJs1SlupqJqEiTNHYoGZgI0fOgokkg91s9gjROKaVimFnE 7Vr/iaDyx1XOLjbTz5XxB0dY02K7Iwrww0o5s99vFzR9KU3MhOlRnqR8CEVZ5XYLfFfH Iq9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:cc; bh=29m9VxVlX1cygVbwxroxIUp2tBTU4nq34nZ2FiozReE=; b=i0PE29qlceVANbPZg7BngAFjVC6i5+ZuMJXvIrnyo+nzyp6dRKIrnfTilYJfC+lXFy +GLfb+WLoCA+one4TH6KeMmQ3YMOIdzz9KFBD9zCXhKQhEpBdkjBx0YRQf0oXgsNT55p xKStLDXZsCLbIb4+QkVr3d5DOuKenl0WpO98XzJ20ykVNKJ7tRT1nl43TM+ELyyz5u6c bHpW7bcAbTw1ZtKX2NwMiKPAVDv3FF1qgkWZDL9qbwWY/VCi+NV/x9rt61wYDc4/T95E nyseDdeHgmB6vr4+kr3NutDZSpWTSnvfzza/wgEOMYtOYSXZxZ/fjn2yyWms75c1YSYH eklg== X-Gm-Message-State: AOAM532E8yGYvAAhI57NJJy42Jn8mFvN0gPoOTprtpB1zDr7YufhFWyY K7ar/cHC1+1Ll1ncL8LW8aE7ylKUDrvhztw9+Q== X-Google-Smtp-Source: ABdhPJxPvXyZJz5yABmprIe2Wi2nZxdszLJ8/RPz1xA9zPm4kfJwjfF5pqyZVXur4gF7wDginbdQwTmFbuL9N8LYpg== X-Received: from kaleshsingh.mtv.corp.google.com ([2620:15c:211:200:f0ed:c8a:dab7:ecc2]) (user=kaleshsingh job=sendgmr) by 2002:a25:8551:0:b0:62c:2928:6f06 with SMTP id f17-20020a258551000000b0062c29286f06mr15147786ybn.586.1649448328922; Fri, 08 Apr 2022 13:05:28 -0700 (PDT) Date: Fri, 8 Apr 2022 13:03:26 -0700 In-Reply-To: <20220408200349.1529080-1-kaleshsingh@google.com> Message-Id: <20220408200349.1529080-4-kaleshsingh@google.com> Mime-Version: 1.0 References: <20220408200349.1529080-1-kaleshsingh@google.com> X-Mailer: git-send-email 2.35.1.1178.g4f1659d476-goog Subject: [PATCH v7 3/6] KVM: arm64: Add guard pages for KVM nVHE hypervisor stack From: Kalesh Singh Cc: will@kernel.org, maz@kernel.org, qperret@google.com, tabba@google.com, surenb@google.com, kernel-team@android.com, Kalesh Singh , James Morse , Alexandru Elisei , Suzuki K Poulose , Catalin Marinas , Mark Rutland , Andrew Jones , Nick Desaulniers , Masahiro Yamada , Changbin Du , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220408_130531_769978_025E3B65 X-CRM114-Status: GOOD ( 20.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Map the stack pages in the flexible private VA range and allocate guard pages below the stack as unbacked VA space. The stack is aligned so that any valid stack address has PAGE_SHIFT bit as 1 - this is used for overflow detection (implemented in a subsequent patch in the series). Signed-off-by: Kalesh Singh Tested-by: Fuad Tabba Reviewed-by: Fuad Tabba --- Changes in v7: - Add Fuad's Reviewed-by and Tested-by tags. Changes in v6: - Update call to hyp_alloc_private_va_range() (return val and params) Changes in v5: - Use a single allocation for stack and guard pages to ensure they are contiguous, per Marc Changes in v4: - Replace IS_ERR_OR_NULL check with IS_ERR check now that hyp_alloc_private_va_range() returns an error for null pointer, per Fuad - Format comments to < 80 cols, per Fuad Changes in v3: - Handle null ptr in IS_ERR_OR_NULL checks, per Mark arch/arm64/include/asm/kvm_asm.h | 1 + arch/arm64/include/asm/kvm_mmu.h | 3 +++ arch/arm64/kvm/arm.c | 39 +++++++++++++++++++++++++++++--- arch/arm64/kvm/mmu.c | 4 ++-- 4 files changed, 42 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h index d5b0386ef765..2e277f2ed671 100644 --- a/arch/arm64/include/asm/kvm_asm.h +++ b/arch/arm64/include/asm/kvm_asm.h @@ -169,6 +169,7 @@ struct kvm_nvhe_init_params { unsigned long tcr_el2; unsigned long tpidr_el2; unsigned long stack_hyp_va; + unsigned long stack_pa; phys_addr_t pgd_pa; unsigned long hcr_el2; unsigned long vttbr; diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index a50cbb5ba402..b805316c4866 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -117,6 +117,9 @@ alternative_cb_end #include #include +extern struct kvm_pgtable *hyp_pgtable; +extern struct mutex kvm_hyp_pgd_mutex; + void kvm_update_va_mask(struct alt_instr *alt, __le32 *origptr, __le32 *updptr, int nr_inst); void kvm_compute_layout(void); diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 523bc934fe2f..5687c0175151 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -1483,7 +1483,6 @@ static void cpu_prepare_hyp_mode(int cpu) tcr |= (idmap_t0sz & GENMASK(TCR_TxSZ_WIDTH - 1, 0)) << TCR_T0SZ_OFFSET; params->tcr_el2 = tcr; - params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE); params->pgd_pa = kvm_mmu_get_httbr(); if (is_protected_kvm_enabled()) params->hcr_el2 = HCR_HOST_NVHE_PROTECTED_FLAGS; @@ -1933,14 +1932,48 @@ static int init_hyp_mode(void) * Map the Hyp stack pages */ for_each_possible_cpu(cpu) { + struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); char *stack_page = (char *)per_cpu(kvm_arm_hyp_stack_page, cpu); - err = create_hyp_mappings(stack_page, stack_page + PAGE_SIZE, - PAGE_HYP); + unsigned long hyp_addr; + /* + * Allocate a contiguous HYP private VA range for the stack + * and guard page. The allocation is also aligned based on + * the order of its size. + */ + err = hyp_alloc_private_va_range(PAGE_SIZE * 2, &hyp_addr); + if (err) { + kvm_err("Cannot allocate hyp stack guard page\n"); + goto out_err; + } + + /* + * Since the stack grows downwards, map the stack to the page + * at the higher address and leave the lower guard page + * unbacked. + * + * Any valid stack address now has the PAGE_SHIFT bit as 1 + * and addresses corresponding to the guard page have the + * PAGE_SHIFT bit as 0 - this is used for overflow detection. + */ + mutex_lock(&kvm_hyp_pgd_mutex); + err = kvm_pgtable_hyp_map(hyp_pgtable, hyp_addr + PAGE_SIZE, + PAGE_SIZE, __pa(stack_page), PAGE_HYP); + mutex_unlock(&kvm_hyp_pgd_mutex); if (err) { kvm_err("Cannot map hyp stack\n"); goto out_err; } + + /* + * Save the stack PA in nvhe_init_params. This will be needed + * to recreate the stack mapping in protected nVHE mode. + * __hyp_pa() won't do the right thing there, since the stack + * has been mapped in the flexible private VA space. + */ + params->stack_pa = __pa(stack_page); + + params->stack_hyp_va = hyp_addr + (2 * PAGE_SIZE); } for_each_possible_cpu(cpu) { diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c index 3d3efea4e991..a54f00bd06cc 100644 --- a/arch/arm64/kvm/mmu.c +++ b/arch/arm64/kvm/mmu.c @@ -22,8 +22,8 @@ #include "trace.h" -static struct kvm_pgtable *hyp_pgtable; -static DEFINE_MUTEX(kvm_hyp_pgd_mutex); +struct kvm_pgtable *hyp_pgtable; +DEFINE_MUTEX(kvm_hyp_pgd_mutex); static unsigned long hyp_idmap_start; static unsigned long hyp_idmap_end;