From patchwork Thu Apr 14 05:35:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 12812926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB9D6C433EF for ; Thu, 14 Apr 2022 05:42:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AVIqommrRZrDfQ2XKupdGjP9oZk44SDyr7tMFGO660E=; b=cVmiTfrXEM2nms WgU6QW9HtVjF1koW4py/c6Pr14FNf9DMYUO5cryJMNDH6uz+lrgB5kO0/HrnVye6og6SVHNfvGSjP /fZCgG6R5Gvca0ZJgZwS/raeEfRqFgHupdvSWNM+xPsqQTf/ey9rOAI3xSQModbqxwli4fBNaoDTK YGr702DmP2BdGOAbjLbWbMLvPdiE8eOpu1tIt6jPd7AXAffSxya+x2kq3eBm+usoY/IfY2DLVbnTG 8DLCE7gabheYCEqvAZadX67Un0Zg+fe8lr71SBqh8qbPZ6BgYO+ouxHCWYx7xqXAKAA+RqvElWkM9 disYNwRP0qAQSvnZmX/w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nesEH-003xW1-Tg; Thu, 14 Apr 2022 05:41:18 +0000 Received: from mo-csw1115.securemx.jp ([210.130.202.157] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nesDy-003xO4-NR for linux-arm-kernel@lists.infradead.org; Thu, 14 Apr 2022 05:41:01 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1115) id 23E5emAS022045; Thu, 14 Apr 2022 14:40:48 +0900 X-Iguazu-Qid: 2wHHts48jTQbsbwmY6 X-Iguazu-QSIG: v=2; s=0; t=1649914848; q=2wHHts48jTQbsbwmY6; m=rm8ElIe+pSTp9jG927rL8YHUpbV988ynWFvhY0Q/nQs= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1110) id 23E5el4c027580 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Thu, 14 Apr 2022 14:40:48 +0900 X-SA-MID: 2385300 From: Yuji Ishikawa To: Mauro Carvalho Chehab , Nobuhiro Iwamatsu Cc: linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, yuji2.ishikawa@toshiba.co.jp Subject: [PATCH v2 1/5] dt-bindings: media: platform: visconti: Add Toshiba Visconti Video Input Interface bindings Date: Thu, 14 Apr 2022 14:35:24 +0900 X-TSB-HOP2: ON Message-Id: <20220414053528.31460-2-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220414053528.31460-1-yuji2.ishikawa@toshiba.co.jp> References: <20220414053528.31460-1-yuji2.ishikawa@toshiba.co.jp> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220413_224059_057680_7B5A1B34 X-CRM114-Status: GOOD ( 11.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds the Device Tree binding documentation that allows to describe the Video Input Interface found in Toshiba Visconti SoCs. Signed-off-by: Yuji Ishikawa Reviewed-by: Nobuhiro Iwamatsu --- .../bindings/media/toshiba,visconti-viif.yaml | 103 ++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml diff --git a/Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml b/Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml new file mode 100644 index 000000000..848ea5019 --- /dev/null +++ b/Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/toshiba,visconti-viif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti5 SoC Video Input Interface Device Tree Bindings + +maintainers: + - Nobuhiro Iwamatsu + +description: | + Toshiba Visconti5 SoC Video Input Interface (VIIF) receives MIPI CSI2 video stream, + processes the stream with embedded image signal processor (L1ISP, L2ISP), then stores pictures to main memory. + +properties: + compatible: + const: toshiba,visconti-viif + + reg: + items: + - description: registers for capture control + - description: registers for CSI2 receiver control + + interrupts: + items: + - description: Sync Interrupt + - description: Status (Error) Interrupt + - description: CSI2 Receiver Interrupt + - description: L1ISP Interrupt + + index: + enum: [0, 1] + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Input port node, single endpoint describing the CSI-2 transmitter. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + description: VIIF supports 2 or 4 data lines + items: + minItems: 1 + maxItems: 4 + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + clock-lanes: + description: VIIF supports 1 clock line + const: 0 + +required: + - compatible + - reg + - interrupts + - port + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + viif0: viif@1c000000 { + compatible = "toshiba,visconti-viif"; + reg = <0 0x1c000000 0 0x6000>, + <0 0x1c008000 0 0x400>; + interrupts = , + , + , + ; + index = <0>; + status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi_in0: endpoint { + remote-endpoint = <&imx219_out0>; + bus-type = <4>; + data-lanes = <1 2>; + clock-lanes = <0>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; + }; +