From patchwork Sat Apr 16 09:01:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2CB2C433EF for ; Sat, 16 Apr 2022 09:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NBmOfWGI29Bqi6TkQAj8b5O+P6E/5zHj24vpBeSDHig=; b=pPK+ij9TO6xzko 89spju4N12TxFk8hAgh4CeWNMeE8baR1lBb+oFT3bedVFHKdqfPApebBlLuQA6kXGm420+jH3bNbw n4f/9rw9zackx5p+BSoCeFA3y+GGmhbWKeTYHL2fFtvRLVL2ntzh4t9TAePOIVVEwvVMehX026Tjd o1HF+snKfqy2QPsEVzgbqpFa9AolVegKU8/4DawXCDDYDQ72e26KF6XlwKXTI7kywxynJA6tSrbWK D9QGFsrdoW3rSrzSjIm6G/BuLsVnJ6+ivzPa79sgOL4wdzDwq6DP9Ve4zRJhXUS3Idz3VkN8iwSBU +Bem6FaffLmw0BqNbDpw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeKU-00CYkW-Kv; Sat, 16 Apr 2022 09:02:54 +0000 Received: from mail-qk1-x730.google.com ([2607:f8b0:4864:20::730]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeJk-00CYL3-Ij; Sat, 16 Apr 2022 09:02:09 +0000 Received: by mail-qk1-x730.google.com with SMTP id d19so197371qko.3; Sat, 16 Apr 2022 02:02:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hOTwp/EOJfvnikKCMdwuTDokMTrvRKo561UbGIFybNc=; b=a8iS2plATz4R7wZvmmY32dCSr5YS2O2lXsCw0VKPRGdE96q+3eqF1DRo3szG71KzMn 3KkZRBxAwblLv9t5I6+EPZ8Vlj+nEMQo5x9FCeT3wwQTe5GfZb5Q9VeAmZhh0hP7z/aF WRS5oNfY67FjqGqYtFerqIfZY6j0J3QtYQk7M4COJsCh6yu0VNSJmVMAIggHZ6S0npRE Tv228oLwB/eotUR+A8CNWxL2OvL/9KygZqZ8a1GUAaLLsDOa1Kmn8vl04lSh3Ahs+0cz Fw/JqzDVhxiEKWr81CUPaUzvB3iq19JVHn8SK+PMBTRBqel0NBL79fSZFBo3t04GHXLJ dv7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hOTwp/EOJfvnikKCMdwuTDokMTrvRKo561UbGIFybNc=; b=J/uuRtXeciX9Q0i1XmrhgO8UGV5Aom/Qi/xPDAPLTshw3XojvWP2FBWR0TigHSCSvS tv4JAbRdxNNyeGXJtJFAjcwBBgy7YA9Ba4knNhSNuJuglNdDmqVCG4NaW0srp6usuWQo 05P/b5zsOrNMVfsXt5MF9RYynhtGwCXvqBt+C0Ph/RFKNwx1Sm7xxad19mlmZrojCkKx /5LmiZCZeWhzW1BcHzTNye/SK5I7WooPoG9pg4hOIbeQLWco/+bHqIm5nz31m8rmQY8/ hAmRpr8g+YDI7wdRYwQF/vNivwQeE/+1OHI4y4ToTOXqhSgS/1p6fwYPl2JzUh6o0U/I OMOg== X-Gm-Message-State: AOAM533cT0NaK/hz6KlBjIwkny2cwG0/QHdLLX4bQfqlziv/Q2TT2iRl ui3GOyZt4kzl/+ATNod2bg4= X-Google-Smtp-Source: ABdhPJwy6iamzpKvOZtqyseBX18jaHXdXj4CmWEXPFoIGi4uoGCyIhZmXb9+lXb5bDL1tXCqBlMXUQ== X-Received: by 2002:a05:620a:2847:b0:67d:2bad:422f with SMTP id h7-20020a05620a284700b0067d2bad422fmr1485218qkp.559.1650099727001; Sat, 16 Apr 2022 02:02:07 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id o6-20020a05622a044600b002e1b9be8e6fsm4258085qtx.36.2022.04.16.02.02.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 02:02:06 -0700 (PDT) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/4] arm64: dts: rockchip: add rk3568 pcie2x1 controller Date: Sat, 16 Apr 2022 05:01:59 -0400 Message-Id: <20220416090159.596930-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416090159.596930-1-pgwipeout@gmail.com> References: <20220416090159.596930-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_020208_659075_0C1AA97F X-CRM114-Status: GOOD ( 10.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The pcie2x1 controller is common between the rk3568 and rk3566. It is a single lane pcie2 compliant controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index ca20d7b91fe5..b2f91aaacca5 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -722,6 +722,61 @@ qos_vop_m1: qos@fe1a8100 { reg = <0x0 0xfe1a8100 0x0 0x20>; }; + pcie2x1: pcie@fe260000 { + compatible = "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xf>; + assigned-clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", "aux"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msi", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <6>; + num-ob-windows = <2>; + max-link-speed = <2>; + msi-map = <0x0 &its 0x0 0x1000>; + num-lanes = <1>; + phys = <&combphy2 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3568_PD_PIPE>; + reg = <0x3 0xc0000000 0x0 0x00400000>, + <0x0 0xfe260000 0x0 0x00010000>, + <0x3 0x00000000 0x0 0x01000000>; + ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000 + 0x02000000 0x0 0x02000000 0x3 0x02000000 0x0 0x3e000000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE20_POWERUP>; + reset-names = "pipe"; + status = "disabled"; + + pcie_intc: legacy-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = ; + }; + + }; + sdmmc0: mmc@fe2b0000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2b0000 0x0 0x4000>;