From patchwork Sat Apr 16 09:08:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3842CC433EF for ; Sat, 16 Apr 2022 09:11:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NBmOfWGI29Bqi6TkQAj8b5O+P6E/5zHj24vpBeSDHig=; b=a+EAX+SBf4Hef2 QWN844LAThVuOEAyA3kDMJwajR59pcQqKiFDKm5GtwbbsJ6Wpalr5BMyLLFPG6o/ErHumVaV4dI+z oFNR0/43wCT0EkC6IbuGulVkCri3ZaZNmEoCfcrQI3IaRVQZrhcL0tZfkzR75GFVJqLTYRBEC7piu kmV/z5yoM2fXKSQrqe1//JlNInkN2wIEDTYPOIw8avhPpjwlxIcXL+ZCIrj2tAr5l83ts7oBo1oxa F3eEDVGs6xK4/JDCGQvMioOFNfK30IbPEI9/0KmV/AuN4QyYyaIJLoWhq4OC5uIg+2yQ3pGIPYka7 lotRErSxAKuqSZvPUE7w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeRQ-00Cb0G-1o; Sat, 16 Apr 2022 09:10:04 +0000 Received: from mail-qt1-x829.google.com ([2607:f8b0:4864:20::829]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeQN-00CaSv-0Z; Sat, 16 Apr 2022 09:09:00 +0000 Received: by mail-qt1-x829.google.com with SMTP id t2so5266313qta.5; Sat, 16 Apr 2022 02:08:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hOTwp/EOJfvnikKCMdwuTDokMTrvRKo561UbGIFybNc=; b=SMFRv5LuFZdQHNzzwLG++T3oIQqej8cJelrAmkeD2oNAGaUH/5sWK7pbS34qVcBIf8 ZqTSismicAoIcGF7RZujdwM9Aad159W/f1VRdD28cM94lbDc+BYZoNJAMovWupCoGk0P hvRLEHM1GqPdCakI7CUWJrJ3AquJZ2NK1aI7PiC8u4el2FBf7OI+FrjvDfVCQ3YPI6Ki 0y50WSK+g2IKIDXSDqLvVJ5wXGSSWn3qiogA5yU831pONtIjiFcn+ZDiydXTt+8F2ixi XxHE3sqaHqQmJHLSrjH0Sck02RyQ8JScRCHSphSKWwsDHNqRm2oNCZHQ8IWpYcYH11rh IRgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hOTwp/EOJfvnikKCMdwuTDokMTrvRKo561UbGIFybNc=; b=tou2N5AV6Bfu8ZcK3+M4p42ZXnLywiAhJNXGWQt0KoaI+WrCaJNVIBU6ubYbSHRkm3 hSG3Su+5AmEVw7Xpru2MG79R5bv1d4ONEhr3JgUn+/4m+qhAX02ZfZ0zqWToep1qHZ/x +7YHU/JWkn11YhFFs0UO5OXyCdypH8CNjr9YhtI1e8rwztSaFe43rUnkxQzo9MWGP0MA pYL8asTPvtSRehEdQxn5zG8iy/hYLbz0ltRlCQ7JVUDrckioFlNfoaH1xs4OAUjP0X8L BWA1lafZFqLqoUWb0Lqc5F1KR+pgiTRWJzRZbscE84m4wDQ/i7Gy0lxjLPSKkcdUmBkq neFQ== X-Gm-Message-State: AOAM530Bbj+f6pJugx8cI+H5hDlcrQDl0QrQJlj3/9vNyeF8eATU9+Mk GqsxncMgpDepponzwV0nC5s= X-Google-Smtp-Source: ABdhPJx3AgJFIiHicGmJXxIoqRGlY6ezrdRGRHxGeX1r/YCifYMQscPj3aJ+Z6CthiW9ZcR2pgepOw== X-Received: by 2002:ac8:5c09:0:b0:2e1:a64d:6f89 with SMTP id i9-20020ac85c09000000b002e1a64d6f89mr1701477qti.452.1650100137708; Sat, 16 Apr 2022 02:08:57 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id t19-20020ac85893000000b002e1afa26591sm4630394qta.52.2022.04.16.02.08.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 02:08:57 -0700 (PDT) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/4] arm64: dts: rockchip: add rk3568 pcie2x1 controller Date: Sat, 16 Apr 2022 05:08:43 -0400 Message-Id: <20220416090844.597470-4-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416090844.597470-1-pgwipeout@gmail.com> References: <20220416090844.597470-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_020859_096048_7291B728 X-CRM114-Status: GOOD ( 10.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The pcie2x1 controller is common between the rk3568 and rk3566. It is a single lane pcie2 compliant controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index ca20d7b91fe5..b2f91aaacca5 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -722,6 +722,61 @@ qos_vop_m1: qos@fe1a8100 { reg = <0x0 0xfe1a8100 0x0 0x20>; }; + pcie2x1: pcie@fe260000 { + compatible = "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xf>; + assigned-clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", "aux"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msi", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <6>; + num-ob-windows = <2>; + max-link-speed = <2>; + msi-map = <0x0 &its 0x0 0x1000>; + num-lanes = <1>; + phys = <&combphy2 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3568_PD_PIPE>; + reg = <0x3 0xc0000000 0x0 0x00400000>, + <0x0 0xfe260000 0x0 0x00010000>, + <0x3 0x00000000 0x0 0x01000000>; + ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000 + 0x02000000 0x0 0x02000000 0x3 0x02000000 0x0 0x3e000000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE20_POWERUP>; + reset-names = "pipe"; + status = "disabled"; + + pcie_intc: legacy-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = ; + }; + + }; + sdmmc0: mmc@fe2b0000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2b0000 0x0 0x4000>;