diff mbox series

arm64: dts: ti: k3-am62-mcu: Enable MCU GPIO module

Message ID 20220421061938.122317-1-vigneshr@ti.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: ti: k3-am62-mcu: Enable MCU GPIO module | expand

Commit Message

Vignesh Raghavendra April 21, 2022, 6:19 a.m. UTC
AM62 has x1 GPIO module and associated interrupt router in MCU Domain.
Add DT nodes for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Aswath Govindraju April 27, 2022, 11:06 a.m. UTC | #1
On 21/04/22 11:49, Vignesh Raghavendra wrote:
> AM62 has x1 GPIO module and associated interrupt router in MCU Domain.
> Add DT nodes for the same.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 28 +++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> index d103824c963f..45343381ad0b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> @@ -53,4 +53,32 @@ mcu_spi1: spi@4b10000 {
>  		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
>  		clocks = <&k3_clks 148 0>;
>  	};
> +
> +	mcu_gpio_intr: interrupt-controller@4210000 {
> +		compatible = "ti,sci-intr";
> +		reg = <0x00 0x04210000 0x00 0x200>;
> +		ti,intr-trigger-type = <1>;
> +		interrupt-controller;
> +		interrupt-parent = <&gic500>;
> +		#interrupt-cells = <1>;
> +		ti,sci = <&dmsc>;
> +		ti,sci-dev-id = <5>;
> +		ti,interrupt-ranges = <0 104 4>;
> +	};
> +
> +	mcu_gpio0: gpio@4201000 {
> +		compatible = "ti,am64-gpio", "ti,keystone-gpio";
> +		reg = <0x0 0x4201000 0x0 0x100>;

nitpick: reg = <0x00 0x04201000 0x00 0x100>;

> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		interrupt-parent = <&mcu_gpio_intr>;
> +		interrupts = <30>, <31>;
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		ti,ngpio = <24>;
> +		ti,davinci-gpio-unbanked = <0>;
> +		power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&k3_clks 79 0>;
> +		clock-names = "gpio";
> +	};
>  };


Aside from the above minor change,

Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Vignesh Raghavendra April 27, 2022, 3:24 p.m. UTC | #2
On 27/04/22 4:36 pm, Aswath Govindraju wrote:
> On 21/04/22 11:49, Vignesh Raghavendra wrote:
>> AM62 has x1 GPIO module and associated interrupt router in MCU Domain.
>> Add DT nodes for the same.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>>  arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 28 +++++++++++++++++++++++++
>>  1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
>> index d103824c963f..45343381ad0b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
>> @@ -53,4 +53,32 @@ mcu_spi1: spi@4b10000 {
>>  		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
>>  		clocks = <&k3_clks 148 0>;
>>  	};
>> +
>> +	mcu_gpio_intr: interrupt-controller@4210000 {
>> +		compatible = "ti,sci-intr";
>> +		reg = <0x00 0x04210000 0x00 0x200>;
>> +		ti,intr-trigger-type = <1>;
>> +		interrupt-controller;
>> +		interrupt-parent = <&gic500>;
>> +		#interrupt-cells = <1>;
>> +		ti,sci = <&dmsc>;
>> +		ti,sci-dev-id = <5>;
>> +		ti,interrupt-ranges = <0 104 4>;
>> +	};
>> +
>> +	mcu_gpio0: gpio@4201000 {
>> +		compatible = "ti,am64-gpio", "ti,keystone-gpio";
>> +		reg = <0x0 0x4201000 0x0 0x100>;
> 
> nitpick: reg = <0x00 0x04201000 0x00 0x100>;

Ah, yes.. Will fix locally before merging.

> 
>> +		gpio-controller;
>> +		#gpio-cells = <2>;
>> +		interrupt-parent = <&mcu_gpio_intr>;
>> +		interrupts = <30>, <31>;
>> +		interrupt-controller;
>> +		#interrupt-cells = <2>;
>> +		ti,ngpio = <24>;
>> +		ti,davinci-gpio-unbanked = <0>;
>> +		power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
>> +		clocks = <&k3_clks 79 0>;
>> +		clock-names = "gpio";
>> +	};
>>  };
> 
> 
> Aside from the above minor change,
> 
> Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
> 

Thanks!

Regards
Vignesh
Vignesh Raghavendra April 28, 2022, 5:17 a.m. UTC | #3
Hi Vignesh Raghavendra,
 
On Thu, 21 Apr 2022 11:49:38 +0530, Vignesh Raghavendra wrote:
> AM62 has x1 GPIO module and associated interrupt router in MCU Domain.
> Add DT nodes for the same.
> 
> 
 
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
 
[1/1] arm64: dts: ti: k3-am62-mcu: Enable MCU GPIO module
      commit: d196d2a98d62c505ab71caf2630575e448dc417c
 
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
 
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
 
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
 
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
 
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
index d103824c963f..45343381ad0b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
@@ -53,4 +53,32 @@  mcu_spi1: spi@4b10000 {
 		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 148 0>;
 	};
+
+	mcu_gpio_intr: interrupt-controller@4210000 {
+		compatible = "ti,sci-intr";
+		reg = <0x00 0x04210000 0x00 0x200>;
+		ti,intr-trigger-type = <1>;
+		interrupt-controller;
+		interrupt-parent = <&gic500>;
+		#interrupt-cells = <1>;
+		ti,sci = <&dmsc>;
+		ti,sci-dev-id = <5>;
+		ti,interrupt-ranges = <0 104 4>;
+	};
+
+	mcu_gpio0: gpio@4201000 {
+		compatible = "ti,am64-gpio", "ti,keystone-gpio";
+		reg = <0x0 0x4201000 0x0 0x100>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&mcu_gpio_intr>;
+		interrupts = <30>, <31>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		ti,ngpio = <24>;
+		ti,davinci-gpio-unbanked = <0>;
+		power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 79 0>;
+		clock-names = "gpio";
+	};
 };