From patchwork Fri Apr 29 12:30:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: German Gomez X-Patchwork-Id: 12831946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E8F7C433F5 for ; Fri, 29 Apr 2022 12:32:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MDr58toA+FvkUlgQ1sbHxpB2IlhIDo9ukeoJ40YhQyE=; b=f+SJEFd4hnxvZK 8kvA0zF7j+dy8+n3rk64KdH87Jl/F9nyUOIk6rg4l/AamLroDYaWEuVFV0SmofoIyWFWw/Ty2cy6W 5DJJMAjdDg5v+/YUnitk+0yn/A562kMnEnLPchowM/4bInNQnzf6XULQtpTCETsm61wBiLDcCd0pL F08u2Pin304ZzFzFFCtdt3C2wv6Saa1hnsJe7Sb2se38YXbAtGM46U7AGfqAK3GsTKYWFEGsNfyq/ 1jrp4Ns4caWv7PLCz9QKGarBVyJ/9KFYvhLdrwo70SvU4BkV1cBZEK6Z2OJSukPPbnEOIYt95H/Uc gC/ueqKuG2y9tWc6NfNw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nkPmr-00B8fI-3t; Fri, 29 Apr 2022 12:31:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nkPmE-00B8Pc-3Z for linux-arm-kernel@lists.infradead.org; Fri, 29 Apr 2022 12:31:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3ED711FB; Fri, 29 Apr 2022 05:31:12 -0700 (PDT) Received: from e127744.arm.com (unknown [10.57.46.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6D40B3F73B; Fri, 29 Apr 2022 05:31:10 -0700 (PDT) From: German Gomez To: coresight@lists.linaro.org, mathieu.poirier@linaro.org, suzuki.poulose@arm.com Cc: james.clark@arm.com, leo.yan@linaro.org, mike.leach@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, German Gomez Subject: [PATCH 1/2] coresight: etm4x: Expose default timestamp source in sysfs Date: Fri, 29 Apr 2022 13:30:59 +0100 Message-Id: <20220429123100.268059-2-german.gomez@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220429123100.268059-1-german.gomez@arm.com> References: <20220429123100.268059-1-german.gomez@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220429_053114_252358_837AE3A8 X-CRM114-Status: GOOD ( 11.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a new sysfs interface in /sys/bus/coresight/devices/etm/ts_source indicating the configured timestamp source when the ETM device driver was probed. The perf tool will use this information to detect if the trace data timestamp matches the kernel time, enabling correlation of CoreSight trace with perf events. Suggested-by: Suzuki K Poulose Signed-off-by: German Gomez Reviewed-by: Leo Yan --- arch/arm64/include/asm/sysreg.h | 1 + .../coresight/coresight-etm4x-sysfs.c | 34 +++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 38508e507d73a..263a7bee06f9a 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1146,6 +1146,7 @@ #define SYS_MPIDR_SAFE_VAL (BIT(31)) #define TRFCR_ELx_TS_SHIFT 5 +#define TRFCR_ELx_TS_MASK ((0x3UL) << TRFCR_ELx_TS_SHIFT) #define TRFCR_ELx_TS_VIRTUAL ((0x1UL) << TRFCR_ELx_TS_SHIFT) #define TRFCR_ELx_TS_GUEST_PHYSICAL ((0x2UL) << TRFCR_ELx_TS_SHIFT) #define TRFCR_ELx_TS_PHYSICAL ((0x3UL) << TRFCR_ELx_TS_SHIFT) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index a0640fa5c55bd..c0c375c0cfde2 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -2264,6 +2264,39 @@ static ssize_t cpu_show(struct device *dev, } static DEVICE_ATTR_RO(cpu); +static int etmv4_to_ts_source(struct etmv4_drvdata *drvdata) +{ + int val; + + if (!drvdata->trfcr) + return -1; + + switch (drvdata->trfcr & TRFCR_ELx_TS_MASK) { + case TRFCR_ELx_TS_VIRTUAL: + case TRFCR_ELx_TS_GUEST_PHYSICAL: + case TRFCR_ELx_TS_PHYSICAL: + val = FIELD_GET(TRFCR_ELx_TS_MASK, drvdata->trfcr); + break; + default: + val = -1; + break; + } + + return val; +} + +static ssize_t ts_source_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = etmv4_to_ts_source(drvdata); + return sysfs_emit(buf, "%d\n", val); +} +static DEVICE_ATTR_RO(ts_source); + static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_nr_pe_cmp.attr, &dev_attr_nr_addr_cmp.attr, @@ -2318,6 +2351,7 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_vmid_val.attr, &dev_attr_vmid_masks.attr, &dev_attr_cpu.attr, + &dev_attr_ts_source.attr, NULL, };