From patchwork Mon May 2 22:41:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12834868 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CEE8BC433EF for ; Mon, 2 May 2022 22:46:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0sLrqVXxCNLCkK4wJGMhSV5pUV/o7Qzuo9B4pnzjyGI=; b=Fso7zY954+3UPE Uv1ST+VWTaidJlLoRfDH9qUYoupfWiYbzmy+53oxlibFBiz2wTMFRhHRM8kZ5lNw7rrPb5QKSH1pu qniue+g1dBptILXlHTSLaUGX2x9zYwSzeYYzqU8iU2VuhgT6eHB5Zk2gttNCz9zTT+9dnUnfn4FGS 6KcvXMm3OsJLq0BWAE+7JNKiaxDmTG4WaGcan+dglfHIdjKaPl+TIGeo/nvwz/GqHrcicY8AbyChI 7y/UWOuCUHYv0BnROz8V1e++wezULj9i3hdaXw/Vi3ERxGBq31JdZt6Cjq3MSoUa1tO211i4ehbdH b89eoVwN0yEasNloVFuQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nlen3-002z0s-V2; Mon, 02 May 2022 22:45:14 +0000 Received: from ssl.serverraum.org ([2a01:4f8:151:8464::1:2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nlejd-002x0v-Vj for linux-arm-kernel@lists.infradead.org; Mon, 02 May 2022 22:41:44 +0000 Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 9056222258; Tue, 3 May 2022 00:41:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1651531297; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WDeyz0LlR3w2vrF+SQ8eLPVhnHyoFLscpmzHcNbmj34=; b=XDW0x8j2GVHkofLH8ZiayccVc56nO0E1ZOf7HBcrYGOZuzmQkK3S5Is96QBdGaWRLbH08A C01YLwZOyt+me+wakYq9FvGuKxct7u9JBcBa6KZW80GEW9NMW2dRs2ZaQ9YHky5FGpL3Nj MbTHhI0vyr1f9xB3luZrEfV7s18MVbs= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Tudor.Ambarus@microchip.com, Horatiu Vultur , Michael Walle Subject: [PATCH v4 09/13] ARM: dts: lan966x: add MIIM nodes Date: Tue, 3 May 2022 00:41:23 +0200 Message-Id: <20220502224127.2604333-10-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220502224127.2604333-1-michael@walle.cc> References: <20220502224127.2604333-1-michael@walle.cc> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220502_154142_201961_A4001613 X-CRM114-Status: GOOD ( 10.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the MDIO controller nodes. The integrated PHYs are connected to the second controller. This controller also takes care of the resets of the integrated PHYs, thus it has two memory regions. The first controller is routed to the external MDIO/MDC pins. By default, they are disabled. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 64290fb43926..0442735910da 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -418,6 +418,37 @@ gpio: pinctrl@e2004064 { #interrupt-cells = <2>; }; + mdio0: mdio@e2004118 { + compatible = "microchip,lan966x-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe2004118 0x24>; + clocks = <&sys_clk>; + status = "disabled"; + }; + + mdio1: mdio@e200413c { + compatible = "microchip,lan966x-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe200413c 0x24>, + <0xe2010020 0x4>; + clocks = <&sys_clk>; + status = "disabled"; + + phy0: ethernet-phy@1 { + reg = <1>; + interrupts = ; + status = "disabled"; + }; + + phy1: ethernet-phy@2 { + reg = <2>; + interrupts = ; + status = "disabled"; + }; + }; + sgpio: gpio@e2004190 { compatible = "microchip,sparx5-sgpio"; reg = <0xe2004190 0x118>;