| Message ID | 20220502224127.2604333-13-michael@walle.cc (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: lan966x: dtsi improvements and KSwitch D10 support | expand |
On 03.05.2022 01:41, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add the switch node and its 8 children ports. All are disabled by default. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > arch/arm/boot/dts/lan966x.dtsi | 62 ++++++++++++++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index d8185f5c7bfc..38e90a31d2dd 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -84,6 +84,68 @@ soc { > #size-cells = <1>; > ranges; > > + switch: switch@e0000000 { > + compatible = "microchip,lan966x-switch"; > + reg = <0xe0000000 0x0100000>, > + <0xe2000000 0x0800000>; > + reg-names = "cpu", "gcb"; > + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "xtr", "fdma", "ana", "ptp", > + "ptp-ext"; > + resets = <&reset 0>; > + reset-names = "switch"; > + status = "disabled"; > + > + ethernet-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port0: port@0 { > + reg = <0>; > + status = "disabled"; > + }; > + > + port1: port@1 { > + reg = <1>; > + status = "disabled"; > + }; > + > + port2: port@2 { > + reg = <2>; > + status = "disabled"; > + }; > + > + port3: port@3 { > + reg = <3>; > + status = "disabled"; > + }; > + > + port4: port@4 { > + reg = <4>; > + status = "disabled"; > + }; > + > + port5: port@5 { > + reg = <5>; > + status = "disabled"; > + }; > + > + port6: port@6 { > + reg = <6>; > + status = "disabled"; > + }; > + > + port7: port@7 { > + reg = <7>; > + status = "disabled"; > + }; > + }; > + }; > + > flx0: flexcom@e0040000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xe0040000 0x100>; > -- > 2.30.2 >
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index d8185f5c7bfc..38e90a31d2dd 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -84,6 +84,68 @@ soc { #size-cells = <1>; ranges; + switch: switch@e0000000 { + compatible = "microchip,lan966x-switch"; + reg = <0xe0000000 0x0100000>, + <0xe2000000 0x0800000>; + reg-names = "cpu", "gcb"; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "xtr", "fdma", "ana", "ptp", + "ptp-ext"; + resets = <&reset 0>; + reset-names = "switch"; + status = "disabled"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + reg = <0>; + status = "disabled"; + }; + + port1: port@1 { + reg = <1>; + status = "disabled"; + }; + + port2: port@2 { + reg = <2>; + status = "disabled"; + }; + + port3: port@3 { + reg = <3>; + status = "disabled"; + }; + + port4: port@4 { + reg = <4>; + status = "disabled"; + }; + + port5: port@5 { + reg = <5>; + status = "disabled"; + }; + + port6: port@6 { + reg = <6>; + status = "disabled"; + }; + + port7: port@7 { + reg = <7>; + status = "disabled"; + }; + }; + }; + flx0: flexcom@e0040000 { compatible = "atmel,sama5d2-flexcom"; reg = <0xe0040000 0x100>;
Add the switch node and its 8 children ports. All are disabled by default. Signed-off-by: Michael Walle <michael@walle.cc> --- arch/arm/boot/dts/lan966x.dtsi | 62 ++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+)