From patchwork Mon May 2 22:41:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12834844 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 932FBC433F5 for ; Mon, 2 May 2022 22:43:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=J9/ubwGqrHLFpT0Q+V+HC+wGAwZU4bR/c+4b6uii1ls=; b=JYVQkBqjA7VfI5 V+J58tNJ6WJtLh5+jzSNwpglNPBooFpDv/1OZaZw+te/QD+yXPnQh+EAUafVGdjmwT43MjQgF9xZT UG16ITozBtIl6YNqf1iJohObcw7wJFdqNpWn2Pp8dD/Wp4vZzpj+A2LRfhmtwCJub4S1W025+07Q0 HUSoIFLVRbSBl2RVvNvGU+TOCnyOQ4bujZfF3wKUFVM88vfx9hKuG79lQUg48nMwj5oalsuk1igLb rU43BWLJsaAKxrO8o/HvsE5E6kh9+AOzpJks2Fszyd/yZqVWJ0IEWEaojAOEpP4DTdF3iWgY82S20 /jCVUO0bT+ZL6NX5BgMA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nlekC-002xG1-8L; Mon, 02 May 2022 22:42:16 +0000 Received: from ssl.serverraum.org ([2a01:4f8:151:8464::1:2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nlejZ-002wyi-H2 for linux-arm-kernel@lists.infradead.org; Mon, 02 May 2022 22:41:39 +0000 Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 6A7BF2224E; Tue, 3 May 2022 00:41:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1651531295; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yOxddNobkG29CG4y5YoXQEAGgvfg9n1rTfCuIDFre0A=; b=O//8n02x/va6UrFEM8Lb+h3Hvlm+3e7mRRe49KP7GYOC2v12fmu0StRpAp1PBQomzQANPr S/l+yWEl8NwAHH/a3qnPg72IG4wxXBs2UwpBurnhRpQTEP1/yfUGY5KMt5XGMi+2wVdLLD 6MpxqMsCQreU8V5E7UUDqi4m5izMPso= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Tudor.Ambarus@microchip.com, Horatiu Vultur , Michael Walle Subject: [PATCH v4 04/13] ARM: dts: lan966x: add all flexcom usart nodes Date: Tue, 3 May 2022 00:41:18 +0200 Message-Id: <20220502224127.2604333-5-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220502224127.2604333-1-michael@walle.cc> References: <20220502224127.2604333-1-michael@walle.cc> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220502_154137_756390_C047C28E X-CRM114-Status: UNSURE ( 9.51 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add all the remaining usart nodes for the flexcom block. Although the DMA channels are specified, DMA is not enabled by default because break detection doesn't work with DMA. Keep the nodes disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 52 ++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index e9d6c16d04cf..ae3ac08cfc3b 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -92,6 +92,19 @@ flx0: flexcom@e0040000 { #size-cells = <1>; ranges = <0x0 0xe0040000 0x800>; status = "disabled"; + + usart0: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; flx1: flexcom@e0044000 { @@ -102,6 +115,19 @@ flx1: flexcom@e0044000 { #size-cells = <1>; ranges = <0x0 0xe0044000 0x800>; status = "disabled"; + + usart1: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; trng: rng@e0048000 { @@ -129,6 +155,19 @@ flx2: flexcom@e0060000 { #size-cells = <1>; ranges = <0x0 0xe0060000 0x800>; status = "disabled"; + + usart2: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; flx3: flexcom@e0064000 { @@ -181,6 +220,19 @@ flx4: flexcom@e0070000 { #size-cells = <1>; ranges = <0x0 0xe0070000 0x800>; status = "disabled"; + + usart4: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; }; timer0: timer@e008c000 {