From patchwork Wed May 4 13:06:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentin Caron X-Patchwork-Id: 12837895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03661C433F5 for ; Wed, 4 May 2022 13:10:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bXcZYHGcBYp0XFWXWKo1vN9HsU9us4GoHfweBsFJHr4=; b=XWP9c4Lr681ImR 6H9Iy1RSJyR7cjC4lukB64R/5EHKPEpOe59gGmBwpSEmzODO+srOxyDlMq3itKiTCLawH8mM9N8st wxW2ilARcZ+dS0X/9OGKfXmn6uNFqrKHiczOtZvyRxTFLfkzbIxUuxVt6QKR4JSY53cV2uANJEanR 1DCW9r7ljUQQEyqj5njrR5Fpc8z0CT3luHiatyOYofO/tNM9grWvAcZd8x/JmlZce79xDwQ+M1PMm 8o787OOb8NbePtAz4IiQkzOxHLSxkolfqqcZI8tNOoX+/I+8fL8vWpimuvd9pOq/+W/vBvbhFh6eI O/8wu+Ug2GmC/vDg2kHA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmEkX-00AwHB-DS; Wed, 04 May 2022 13:09:02 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmEiL-00Auj8-1V for linux-arm-kernel@lists.infradead.org; Wed, 04 May 2022 13:06:46 +0000 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 244A6O13016063; Wed, 4 May 2022 15:06:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=4Jy00+YKj9FKRS8Ur8OX4MxIhckz7ncmunjwkkM24WU=; b=w+8C3uhPbIHWcR0v/Y5md2uXXXyc8bQ1RRqMalvJJ14vnd16xVfeikaFX7MSWvEaU0TN IDuKwFI7shTHM8d58gAxDPeU0zGrBPbUMRLwI5K0H9UiIZCfUur5rKdgkplvF8LQmrJ8 JKXzzQtJ4MLn9k7EoKkMun3yBmzZWeYnSkc/pUTp4vp6dF8cMcWFkW4DExgfg2s0jZY3 XSFiaNe4wDJXOFlkXQwafALj1XER1C0ARODv9EbAz1kcxkhw42O2wHg5EvVdFkpNHNZX +0XXdLF/+jtlT3jc6qrjkHb6gS4yL5Um+/9q+Yv6CzPiji/n+MUCI/04xCihVBxWCq3J vA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3frvf0m59p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 May 2022 15:06:38 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6F28710002A; Wed, 4 May 2022 15:06:37 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 6634C21FEA9; Wed, 4 May 2022 15:06:37 +0200 (CEST) Received: from localhost (10.75.127.46) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Wed, 4 May 2022 15:06:36 +0200 From: Valentin Caron To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Alexandre Torgue CC: Gabriel Fernandez , Amelie Delaunay , Valentin Caron , , , , , Subject: [PATCH 2/6] dt-bindings: rtc: stm32: add alarm A out property to select output Date: Wed, 4 May 2022 15:06:13 +0200 Message-ID: <20220504130617.331290-1-valentin.caron@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220504130233.330983-1-valentin.caron@foss.st.com> References: <20220504130233.330983-1-valentin.caron@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-04_04,2022-05-04_01,2022-02-23_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_060645_430654_42A32D1F X-CRM114-Status: GOOD ( 18.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org STM32 RTC can pulse some SOC pins when an alarm of RTC expires. This patch adds property to activate alarm A output. The pulse can output on three pins RTC_OUT1, RTC_OUT2, RTC_OUT2_RMP (PC13, PB2, PI8 on stm32mp15) (PC13, PB2, PI1 on stm32mp13). Signed-off-by: Valentin Caron --- .../devicetree/bindings/rtc/st,stm32-rtc.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml index 56d46ea35c5d..71e02604e8de 100644 --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml @@ -59,6 +59,13 @@ properties: Refer to for the supported values. Pinctrl state named "default" may be defined to reserve pin for RTC output. + st,alarm: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: | + To select and enable RTC Alarm A output. + Refer to for the supported values. + Pinctrl state named "default" may be defined to reserve pin for RTC output. + allOf: - if: properties: @@ -75,6 +82,9 @@ allOf: st,lsco: maxItems: 0 + st,alarm: + maxItems: 0 + clock-names: false required: @@ -95,6 +105,9 @@ allOf: st,lsco: maxItems: 0 + st,alarm: + maxItems: 0 + required: - clock-names - st,syscfg @@ -117,6 +130,9 @@ allOf: st,lsco: maxItems: 1 + st,alarm: + maxItems: 1 + required: - clock-names @@ -153,8 +169,9 @@ examples: clocks = <&rcc RTCAPB>, <&rcc RTC>; clock-names = "pclk", "rtc_ck"; interrupts = ; + st,alarm = ; st,lsco = ; - pinctrl-0 = <&rtc_out2_rmp_pins_a>; + pinctrl-0 = <&rtc_out1_pins_a &rtc_out2_rmp_pins_a>; pinctrl-names = "default"; };