From patchwork Thu May 5 09:56:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen (ThunderTown)" X-Patchwork-Id: 12839318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4F337C433EF for ; Thu, 5 May 2022 09:58:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Apf8qpnrQwTDBBAE9s8z4n12JIxlvs67kpg/Tp13XOY=; b=j4ALDpFGNAmY7E 2dkqHfEhkYg97QCgGverZvsvEszdUGiXl3tlXFbnP5aSkp2P04pPowLxyeC1VJzXaG36mXZP/uzQs nHIfLvJqnZHWop0sk/vLGD1Z5OeTMliQbb46T3S92EXkoVaJmf/PzQJNUBUSO070AaPIKgs/bhS0/ zM8TQK/2Z97/AGGfiXsGPrO6UyBgVjedOEGCWEpfAkxt2y3fuyaJ0wjdzH78TUrCqJmcvnPBRJoQQ 15tc+aiWwXZUXXFP/RX89FvBEwVgnVLYL8ZnvREyGECWfwM4P5qyEXbbmjmz5ibaDc4USuhgnQEa8 ixBkoKtCGTzqbXW5Dskw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmYEm-00F9LH-GK; Thu, 05 May 2022 09:57:32 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmYEi-00F9IC-3g for linux-arm-kernel@lists.infradead.org; Thu, 05 May 2022 09:57:30 +0000 Received: from dggpemm500023.china.huawei.com (unknown [172.30.72.53]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4Kv8Dv2hp1zGpWF; Thu, 5 May 2022 17:54:39 +0800 (CST) Received: from dggpemm500006.china.huawei.com (7.185.36.236) by dggpemm500023.china.huawei.com (7.185.36.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 17:57:20 +0800 Received: from thunder-town.china.huawei.com (10.174.178.55) by dggpemm500006.china.huawei.com (7.185.36.236) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 17:57:20 +0800 From: Zhen Lei To: Catalin Marinas , Will Deacon , , CC: Zhen Lei Subject: [PATCH v3] arm64: add the printing of tpidr_elx in __show_regs() Date: Thu, 5 May 2022 17:56:40 +0800 Message-ID: <20220505095640.312-1-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.174.178.55] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpemm500006.china.huawei.com (7.185.36.236) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_025728_342129_811DD0E7 X-CRM114-Status: UNSURE ( 8.06 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Commit 7158627686f0 ("arm64: percpu: implement optimised pcpu access using tpidr_el1") and commit 6d99b68933fb ("arm64: alternatives: use tpidr_el2 on VHE hosts") use tpidr_elx to cache my_cpu_offset to optimize pcpu access. However, when performing reverse execution based on the registers and the memory contents in kdump, this information is sometimes required if there is a pcpu access. Signed-off-by: Zhen Lei --- arch/arm64/kernel/process.c | 5 +++++ 1 file changed, 5 insertions(+) v2 --> v3: 1) Relace "switch (read_sysreg(CurrentEL))" statement with "if (is_kernel_in_hyp_mode())" statement. 2) Change the register name to lowercase. v1 --> v2: Directly print the tpidr_elx register of the current exception level. Avoid coupling with the implementation of 'my_cpu_offset'. diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 7fa97df55e3ad3f..7b6bccce9721c36 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -216,6 +216,11 @@ void __show_regs(struct pt_regs *regs) show_regs_print_info(KERN_DEFAULT); print_pstate(regs); + if (is_kernel_in_hyp_mode()) + printk("tpidr_el2 : %016llx\n", read_sysreg(tpidr_el2)); + else + printk("tpidr_el1 : %016llx\n", read_sysreg(tpidr_el1)); + if (!user_mode(regs)) { printk("pc : %pS\n", (void *)regs->pc); printk("lr : %pS\n", (void *)ptrauth_strip_insn_pac(lr));