From patchwork Thu May 5 19:45:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12840130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46B88C433EF for ; Thu, 5 May 2022 19:53:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HOi52JljFkg8eAZPPwSUdbFAR7pOvaa6D18GJ1YHL3k=; b=LjayqzUyRD4Spt E8ld8abKzXPVOP9CYgfSEX35Osk7yrYYt/ZyVkpDJyCTGm36d4UlsgNuPzyjp9ZNgsIaAnifo/J+V ablX2NcgjV2J27DwvnyzWPPrWGBjLDPCLFDuM/A9PLqvTv7Ee9goky+cSfEvkbebXBh4x9i6l093C RVTgEevaOcz1RibboK/CvSQ5YKZ+y2QfpXTj8IRh2X6iAfbp9T2qV5vPMIVC2gu10bttot/SZkqQG wC2Zie1jFZ9B+vaoGRLnkRP+eN36q44OzYS0qFy15RHehpSTpUEVWcQkkGHGy+1JjCEvt/jUUd1Wi rQ8FFbHxmu4svu0Ls3dQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhVu-0000O0-RE; Thu, 05 May 2022 19:51:51 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhRG-00HY6R-9W; Thu, 05 May 2022 19:47:04 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id A6FE71F45CD3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780021; bh=riKUyF3QA26FPC6IN4C9exUYKfoEiGvXUwpYMcRDj7M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IEVITc3sCSDV2yoTf1mQwuHfgdj8nF+d/X2n/ZXKi5YwM4pS/WjEOl1DDvuWwo0cX HRjoOZee/WLN0iYDbwq3L9ydeRrTcCQoKLpcx3sD6uXW+L9di4gL1P7yjES8JrRTZW /PIYVbLAV0WClG+LBhsMYiLY/8LzDaRruJ/whCVuUVJngCTA1WixTyslwdSff4daGY S1mjJ6Uv2yolUv3Wcyb5cKE92j4ate6tCwKPdN+rxgyrb2k6tY1s/Lt5JHd2DrTKJ1 F4I3r5vPy3rqobPCxOvXQ9V6zXFeE1WG9wn3UTDOOPczbAqri0k0AX1IX5CBw5MNrz 5qD5Q98uEZ7nQ== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 16/16] arm64: dts: mediatek: asurada: Add SPMI regulators Date: Thu, 5 May 2022 15:45:50 -0400 Message-Id: <20220505194550.3094656-17-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_124702_520386_FC7BA8B3 X-CRM114-Status: GOOD ( 10.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Asurada platform uses regulators from MT6315 PMICs acessible through SPMI. Add support for them. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index a9ffa74b2764..7f4cee928f71 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -7,6 +7,7 @@ #include "mt8192.dtsi" #include "mt6359.dtsi" #include +#include / { aliases { @@ -683,6 +684,54 @@ cr50@0 { }; }; +&spmi { + #address-cells = <2>; + #size-cells = <0>; + + mt6315_6: pmic@6 { + compatible = "mediatek,mt6315-regulator"; + reg = <0x6 SPMI_USID>; + + regulators { + mt6315_6_vbuck1: vbuck1 { + regulator-compatible = "vbuck1"; + regulator-name = "Vbcpu"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1193750>; + regulator-enable-ramp-delay = <256>; + regulator-allowed-modes = <0 1 2>; + regulator-always-on; + }; + + mt6315_6_vbuck3: vbuck3 { + regulator-compatible = "vbuck3"; + regulator-name = "Vlcpu"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1193750>; + regulator-enable-ramp-delay = <256>; + regulator-allowed-modes = <0 1 2>; + regulator-always-on; + }; + }; + }; + + mt6315_7: pmic@7 { + compatible = "mediatek,mt6315-regulator"; + reg = <0x7 SPMI_USID>; + + regulators { + mt6315_7_vbuck1: vbuck1 { + regulator-compatible = "vbuck1"; + regulator-name = "Vgpu"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1193750>; + regulator-enable-ramp-delay = <256>; + regulator-allowed-modes = <0 1 2>; + }; + }; + }; +}; + &uart0 { status = "okay"; };