From patchwork Thu May 5 19:45:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12840101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89211C433EF for ; Thu, 5 May 2022 19:48:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ArEmrIOyDGoOwHL5a+PqO/l4XATOzMUUfIFX82x30d4=; b=UJU/vb+qdXTENH FimYKGdevzSpEDwHb5FDzE8OcvSvN47ZW2fm29Pzi6Y6n6BFS+vp/0/8DDWOTYMkljWhFfqOl5KtX iZFB1cYmrsgKyf4Dwo61E88xSVcfiFOKe4VJ8yly4VjfqXiMVegbIPq44tqcHQ5a0xEJrBYN15hTC GfHQc/cXrIno8huWAEGWPXJPVjC9PNZi7UkNVNRfPrP0kt5JH/VApocm6HN3nkwWMK9bxCZlpxx+q fq8a3gUdmvlNv95uQAuHz8rEC/pjGsPPRbV6/TDc69eznwNS+6CjfhbPr9OL3O6HCFvSGbQxt6DZl +yNWbslIg/oDKugfBrRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhRs-00HYZM-Ok; Thu, 05 May 2022 19:47:40 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhQl-00HXkI-Kz; Thu, 05 May 2022 19:46:33 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 8D1111F45CCB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779990; bh=I6V1qhlJl3e4i+gbr+q91PTZx0jogs0Jp+BzGxZx2KE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TW06FaAmI0ySY7OshRtxKpiWkT8By/BDpG0/bMqo7BdF1ZvxjVqFAOC5wrNrVHtUR WJAkewcDestegsNrKlFxerdHr6Pl2+/5VHqy/oK0yu/aay2lc5zmHI6LalzT/spr1y 89GihkT0L92RSIxX18NuevodbMabh6sZ+pbUyng3PIT16k8j5oioirdNbux/OmAghp iAVFdGyCWfy6tEkOxcIjwNrATs32aPF5eABgkKJJIo32jsiogZnwqCJ3lxMnAdemvb RqJDse0mK7FFnDO5WUTxS90w1F86oD1pFuM0EkMZMX9W6G6mP8rznAMg5ckXCycYYT /r4izLAdEGq+w== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 06/16] arm64: dts: mediatek: asurada: Enable and configure I2C and SPI busses Date: Thu, 5 May 2022 15:45:40 -0400 Message-Id: <20220505194550.3094656-7-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_124631_844155_E350D92A X-CRM114-Status: UNSURE ( 9.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Asurada platform has five I2C controllers and two SPI controllers that are used. In preparation for enabling the devices connected to these controllers, enable and configure their busses. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 5cb7580a13cf..3c5b1e475cf6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -85,6 +85,47 @@ ppvar_sys: ppvar-sys { }; }; +&i2c0 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; +}; + +&i2c1 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +}; + +&i2c2 { + status = "okay"; + + clock-frequency = <400000>; + clock-stretch-ns = <12600>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +&i2c3 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; +}; + +&i2c7 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pins>; +}; + &pio { /* 220 lines */ gpio-line-names = "I2S_DP_LRCK", @@ -311,6 +352,95 @@ &pio { "AUD_DAT_MOSI1", "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + + i2c0_pins: i2c0-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <7>; + }; + }; + + i2c1_pins: i2c1-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <7>; + }; + }; + + i2c2_pins: i2c2-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <0>; + }; + }; + + i2c3_pins: i2c3-default-pins { + pins-bus { + pinmux = , + ; + bias-disable; + mediatek,drive-strength-adv = <7>; + }; + }; + + i2c7_pins: i2c7-default-pins { + pins-bus { + pinmux = , + ; + bias-disable; + mediatek,drive-strength-adv = <7>; + }; + }; + + spi1_pins: spi1-default-pins { + pins-cs-mosi-clk { + pinmux = , + , + ; + bias-disable; + }; + + pins-miso { + pinmux = ; + bias-pull-down; + }; + }; + + spi5_pins: spi5-default-pins { + pins-bus { + pinmux = , + , + , + ; + bias-disable; + }; + }; +}; + +&spi1 { + status = "okay"; + + mediatek,pad-select = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; +}; + +&spi5 { + status = "okay"; + + cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>; + mediatek,pad-select = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins>; }; &uart0 {