diff mbox series

[v1,1/6] dt-binding: clock: Add missing rk3568 cru bindings

Message ID 20220511150117.113070-2-pgwipeout@gmail.com (mailing list archive)
State New, archived
Headers show
Series Cleanups and enablement for Quartz64-A | expand

Commit Message

Peter Geis May 11, 2022, 3:01 p.m. UTC 
The rk3568 cru requires a clock input and a phandle to the grf node. Add
these bindings to clear some dtbs_check warnings.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
 .../bindings/clock/rockchip,rk3568-cru.yaml         | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Krzysztof Kozlowski May 12, 2022, 2:21 p.m. UTC | #1 
On 11/05/2022 17:01, Peter Geis wrote:
> The rk3568 cru requires a clock input and a phandle to the grf node. Add
> these bindings to clear some dtbs_check warnings.
> 
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
>  .../bindings/clock/rockchip,rk3568-cru.yaml         | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
index b2c26097827f..fc7546f521c5 100644
--- a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
@@ -34,6 +34,19 @@  properties:
   "#reset-cells":
     const: 1
 
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: xin24m
+
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the syscon managing the "general register files" (GRF),
+      if missing pll rates are not changeable, due to the missing pll
+      lock status.
+
 required:
   - compatible
   - reg