From patchwork Thu May 12 20:55:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12848117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30753C433EF for ; Thu, 12 May 2022 21:00:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uLsWiEh3fFvaI2OhDFDh8sZeS8CVeX76xyEskx7XZsc=; b=wTNe2/I1/AMGAk SNxaYBI3OV/JCSLoTsgE0I1am8tcQmePpFM4f11RYZuDtU+cL5sGo9WwKkukmWemt1q80vIkoCWHL ZGCgN3jebzD4OWBTXaZgXh/kUt5DqhDcaIKnTtaFOSFcNjy+gtMZTAnLw6ryDAQeBtMdLbRxyFlMV Uop62XIjmvoUKej5uNTuhbiyzfe2ADMyE1ZOHXsILSfr2tXGjqw6M0mKDkhhy8JBKEqy1CjlYsAZA xpK7Q7DWAq9wD1FJr489oSOCWMUmPLfaSuAv4EYzcWvW+8LyT9aQyXUjtiq5q7kcmWj6DWyD9Bef/ ymdTKXPzPiymKREsSQpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npFu2-00DSxz-L2; Thu, 12 May 2022 20:59:19 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1npFrP-00DRIN-GH; Thu, 12 May 2022 20:56:36 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id ED4B11F45945 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388994; bh=8931BEPpRMo9jwNwHld86dfIKOtzN61ZDy8g9afbC0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YLxYb8ta5a6kjhDiboyTyxwDCKdK4bJow0DMQO6QC7D/gKxdW7+8Fbv2zPWwOqZ8/ 7XxA+B/UZKBQ8xlRHlV/2RhGp8BXp2aSNsteFCxBWsmRMtc2BFD6z8C5i59nR5fOM4 jqy0E+NieQ3PA92yNOT7lk1b+a6gtdgnjMHQjc+1/Bi4CoASmBzjFkbx/mNGR928+3 C0L6o2DmUmq+mO+FQZRRl7fHadtFSNEUxZ839TouRp+FZ6MJwkmYYG5zzNoNstHhan apVGdkDdplpM/CDhpXtz0c4K2RvDkpLXcPCGzXrdFrbLwHhS/PXoxDygp/lz+DMgUz T3cdxUc4D9C9Q== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 09/16] arm64: dts: mediatek: asurada: Add Cr50 TPM Date: Thu, 12 May 2022 16:55:55 -0400 Message-Id: <20220512205602.158273-10-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220512_135635_724605_A37D874F X-CRM114-Status: GOOD ( 10.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Asurada platform has a Google Security Chip connected to the SPI5 bus. It runs the cr50 firmware and provides TPM functionality. Add support for it. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index bcfa688b67f7..ddf18861edad 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include / { aliases { @@ -353,6 +354,13 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + cr50_int: cr50-irq-default-pins { + pins-gsc-ap-int-odl { + pinmux = ; + input-enable; + }; + }; + cros_ec_int: cros-ec-irq-default-pins { pins-ec-ap-int-odl { pinmux = ; @@ -517,6 +525,15 @@ &spi5 { mediatek,pad-select = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi5_pins>; + + cr50@0 { + compatible = "google,cr50"; + reg = <0>; + interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency = <1000000>; + pinctrl-names = "default"; + pinctrl-0 = <&cr50_int>; + }; }; &uart0 {