From patchwork Thu May 12 20:56:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12848137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 878EDC433F5 for ; Thu, 12 May 2022 21:03:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HDlO/uWqOBOd2b/ck+/oVgS0Fu7fNFkp8vGz0oQkBwI=; b=FdioqwVA1nhk6G o1c50/eMu5N1PWyAcmDTtUuBCXtRFPY0yzCBBT1rWpccdBEHiwV4XSjPcgYGSyUWPM0tS45rIuAJJ R6O7oG1nXPQ3G8KwHo3OQxJcPjy/bNpB61HBsLLDL5pzM5EUlLNTtkcxd1NZqXg2vZyOvovCNNnRg zasEFlkFTY+E4UxtPIZqAsn+1ManVLiFk2rm4a8QvGUNh/s1zl4RS3PNraoz0JSDLgdZfVtkeCwiB P+dJG0nQ6LM33xdG6QBQtVsUTJKbFEnJMAgE9XsH97+gikBAisxpw8bg5pTmWOJ6qyrZTPNIk5FoJ R7koHR+kqWo2FPkkMz6g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npFwP-00DUOP-MH; Thu, 12 May 2022 21:01:46 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1npFrZ-00DRPT-9U; Thu, 12 May 2022 20:56:46 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 79CEF1F45AAB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652389004; bh=i7Z2W6YC5XDeB3fbg7wPBOxu/CQV/7/SaA7a+o0HOSo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l9+Fvbu8wTUi1CFOOJfCnD2jxLfrwNzOZxzZ/fboIaNLXkDYcSHLCf6qL1o3C18MP 1JUo7sQqTr7QHGmPEbjUVG13aqSXCTfXR1syo/RPGzBsoZ/0C0QP4EkNthe/5aRExS AsFRMSEGaswkzPIx+uFdFuK8pmwa9juMTzWIwkSNe/8QueDTRDgixBVeHIDvq0CdUB CcFidUoXzQ72XxV25ZIRpRd1veVcO9J425Lm8bSbf03SRmBOzvqKooz0GpI91OHoaJ 4AIoYMeiADPJAyH09C1u1+b3eo5IM54g4Hf2AQp7sRTUbTDVd1RjrKWI4TyMKC/kmV vjUpXF4ijxuaw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 14/16] arm64: dts: mediatek: asurada: Enable PCIe and add WiFi Date: Thu, 12 May 2022 16:56:00 -0400 Message-Id: <20220512205602.158273-15-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220512_135645_500143_E7B6F68F X-CRM114-Status: GOOD ( 13.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable MT8192's PCIe controller and add support for the MT7921e WiFi card that is present on that bus for the Asurada platform. Signed-off-by: NĂ­colas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v3: - Renamed regulator node to be generic Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index ecae2730789e..dde4de27ec61 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -66,6 +66,19 @@ pp3300_u: regulator-3v3-u { vin-supply = <&pp3300_g>; }; + pp3300_wlan: regulator-3v3-wlan { + compatible = "regulator-fixed"; + regulator-name = "pp3300_wlan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pp3300_wlan_pins>; + enable-active-high; + gpio = <&pio 143 GPIO_ACTIVE_HIGH>; + }; + /* system wide switching 5.0V power rail */ pp5000_a: regulator-5v0-a { compatible = "regulator-fixed"; @@ -84,6 +97,17 @@ ppvar_sys: regulator-var-sys { regulator-always-on; regulator-boot-on; }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + wifi_restricted_dma_region: wifi@c0000000 { + compatible = "restricted-dma-pool"; + reg = <0 0xc0000000 0 0x4000000>; + }; + }; }; &i2c0 { @@ -144,6 +168,28 @@ &i2c7 { pinctrl-0 = <&i2c7_pins>; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + + pcie0: pcie@0,0 { + device_type = "pci"; + reg = <0x0000 0 0 0 0>; + num-lanes = <1>; + bus-range = <0x1 0x1>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi: wifi@0,0 { + reg = <0x10000 0 0 0 0x100000>, + <0x10000 0 0x100000 0 0x100000>; + memory-region = <&wifi_restricted_dma_region>; + }; + }; +}; + &pio { /* 220 lines */ gpio-line-names = "I2S_DP_LRCK", @@ -434,6 +480,34 @@ pins-bus { }; }; + pcie_pins: pcie-default-pins { + pins-pcie-wake { + pinmux = ; + bias-pull-up; + }; + + pins-pcie-pereset { + pinmux = ; + }; + + pins-pcie-clkreq { + pinmux = ; + bias-pull-up; + }; + + pins-wifi-kill { + pinmux = ; /* WIFI_KILL_L */ + output-high; + }; + }; + + pp3300_wlan_pins: pp3300-wlan-pins { + pins-pcie-en-pp3300-wlan { + pinmux = ; + output-high; + }; + }; + spi1_pins: spi1-default-pins { pins-cs-mosi-clk { pinmux = ,