From patchwork Thu May 12 20:55:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12848114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D7ADC433EF for ; Thu, 12 May 2022 20:59:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=e//LkIiz7G0BDi1yMod18gPPM1kk0TQq/GGb2x1pLjo=; b=1CMv6NugSaSQjM vNx8YD8ZlkexnpCT0RgFJv2rmh1DZFjgpiwhsZpibQzNbzpOAx+jRHaRAwD0UXJs4YbRq36xH8njv G09PGX0epHC/DK/nTAiok/4OJobtNx2O9F0i02TWS/z1M1fSMGPiYwml2/XrLqeIq66GTGrzZeyqE UOLJSFtmUSzCjC1IwUcXK7oYV2zDL/PFV4llw/iOBRWPmUSMszd+h5bx+SPFFv5ydquoE7rn0aRlM mhXJ7CXkE19PzThgB8hTWXlKrQ02ijf0ZX98wLj7SSh1IX3A19ZjHid/Bb+L2CpcrN+f5oKKlfTh4 KdnuXF/V6WXU51rMycow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npFsy-00DSJo-Bp; Thu, 12 May 2022 20:58:13 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1npFrD-00DRBm-HS; Thu, 12 May 2022 20:56:25 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id EF0091F4586A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388982; bh=YqWlVpmLvyMqVh31pbNW57iaZRVckJ8tr9KyK+2OHmw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ADLIjj2n3ZAFp4Hg6jXTr9H+pg6wj9FtJseKNE+UWqtNdkGuQt7cl/xyEd9+WFulX 3YM6Kf+h4JKJTI/YCaqGIfQKSWwfZHFRdqZXKAkcJM53wbRvdzhOYd9fNoVf1IhqHJ f/Iudlfq7KgMxpJNqGD1YfGsyvdX3wfsPXO3fbNUaTR0DM/AmBPjcLrGYJphLyk2Ci dhq0gyXO/01gc9TuUMkwxzajbL3W1ePojbvGRJQHxIL/8TwnBGQkxBkKTAPZ0GQkZv QUFMwk8kLK6mFcwJDYQw/48wgbYGxij+qnZdweqRGm5sqxc+hTNCe2tNfkVfsFg/N/ EcRaHoqIqmjmw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 06/16] arm64: dts: mediatek: asurada: Enable and configure I2C and SPI busses Date: Thu, 12 May 2022 16:55:52 -0400 Message-Id: <20220512205602.158273-7-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220512_135623_765402_0CC5BFCE X-CRM114-Status: GOOD ( 10.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Asurada platform has five I2C controllers and two SPI controllers that are used. In preparation for enabling the devices connected to these controllers, enable and configure their busses. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index ca55dd095e80..4fce48d0f653 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -85,6 +85,47 @@ ppvar_sys: regulator-var-sys { }; }; +&i2c0 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; +}; + +&i2c1 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +}; + +&i2c2 { + status = "okay"; + + clock-frequency = <400000>; + clock-stretch-ns = <12600>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +&i2c3 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; +}; + +&i2c7 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pins>; +}; + &pio { /* 220 lines */ gpio-line-names = "I2S_DP_LRCK", @@ -311,6 +352,95 @@ &pio { "AUD_DAT_MOSI1", "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + + i2c0_pins: i2c0-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <7>; + }; + }; + + i2c1_pins: i2c1-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <7>; + }; + }; + + i2c2_pins: i2c2-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <0>; + }; + }; + + i2c3_pins: i2c3-default-pins { + pins-bus { + pinmux = , + ; + bias-disable; + mediatek,drive-strength-adv = <7>; + }; + }; + + i2c7_pins: i2c7-default-pins { + pins-bus { + pinmux = , + ; + bias-disable; + mediatek,drive-strength-adv = <7>; + }; + }; + + spi1_pins: spi1-default-pins { + pins-cs-mosi-clk { + pinmux = , + , + ; + bias-disable; + }; + + pins-miso { + pinmux = ; + bias-pull-down; + }; + }; + + spi5_pins: spi5-default-pins { + pins-bus { + pinmux = , + , + , + ; + bias-disable; + }; + }; +}; + +&spi1 { + status = "okay"; + + mediatek,pad-select = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; +}; + +&spi5 { + status = "okay"; + + cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>; + mediatek,pad-select = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins>; }; &uart0 {