From patchwork Fri May 13 19:44:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 12849326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE8B2C433F5 for ; Fri, 13 May 2022 19:46:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=U6VDwdNT1LXoWbstGml15uHFvmag/e33EgwWDDvJjw0=; b=M1xg5kT2wGoGto mvIkO7LHZRwt0dQI5RcgHFEs7xjFHxY1KYu/ljxR1Gfp6DJvkZwXYEbhVlrWa9CzMpXB/DwyH+ccD RyAvqaHNT2PIXU1iSC56gtGxjxxAnL6ktPZZwLy6pLQTBU2xgWInhjfB924xMHnokCUq778iz8kPd eVDhWVizZAYL1AOh3lHd7mrFDaqUGtXANe1y7+yBnfJs7GVIRLehhwPclR2Qbfa4LjiJA4aEszDuV oDHXgoOlDOsGE9gxlI/qO35cRSOY9nSwbJTGhyJ5SuMfpl8UcDV9NY31d4qvax8IVRef+o5Xv+7fj E3NNzWIAYIJtnBjj6RRw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npbDt-00HMy4-LM; Fri, 13 May 2022 19:45:13 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1npbDp-00HMwy-T3 for linux-arm-kernel@lists.infradead.org; Fri, 13 May 2022 19:45:11 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 24DJiwfh111964; Fri, 13 May 2022 14:44:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1652471098; bh=qMbUUmCdSX2UP9WkDpZKcRdHK4nWn1RFjF/SkedJ/uQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=O99B66BW8hhWCQ+yGFQuz+6CKgsXyfwdt/vrKSomPYGXwHcMYws4yPtt2exSwqPdt ThfXPAwT8xAbFzIkK7mpozsWOxjxOobYs1MMBiRHqv4TyWeaI8Y+y9AHtJcBXmwFDh q7q0HUS39Emiv5bJJXu0rghdMsrwsu5u/a4jv124= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 24DJiwQD112108 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 May 2022 14:44:58 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Fri, 13 May 2022 14:44:58 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Fri, 13 May 2022 14:44:58 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 24DJiwBH067045; Fri, 13 May 2022 14:44:58 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring , Alexandre Belloni , Alessandro Zummo CC: , , , , Vignesh Raghavendra , Andrew Davis , Nishanth Menon Subject: [PATCH V3 1/2] dt-bindings: rtc: Add TI K3 RTC description Date: Fri, 13 May 2022 14:44:56 -0500 Message-ID: <20220513194457.25942-2-nm@ti.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220513194457.25942-1-nm@ti.com> References: <20220513194457.25942-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220513_124510_078869_D9185690 X-CRM114-Status: GOOD ( 13.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds the documentation for the devicetree bindings of the Texas Instruments RTC modules on K3 family of SoCs such as AM62x SoCs or newer. Signed-off-by: Nishanth Menon Reviewed-by: Krzysztof Kozlowski --- Changes since V2: * Krzysztof's comments addressed (rtc.yaml, dropped wakeup-source, switched over to unevaluatedProperties) V2: https://lore.kernel.org/all/20220511002600.27964-2-nm@ti.com/ V1: https://lore.kernel.org/all/20220412073138.25027-2-nm@ti.com/ .../devicetree/bindings/rtc/ti,k3-rtc.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml diff --git a/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml b/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml new file mode 100644 index 000000000000..d995ef04a6eb --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/ti,k3-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 Real Time Clock + +maintainers: + - Nishanth Menon + +description: | + This RTC appears in the AM62x family of SoCs. + +allOf: + - $ref: "rtc.yaml#" + +properties: + compatible: + enum: + - ti,am62-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: VBUS Interface clock + - description: 32k Clock source (external or internal). + + clock-names: + items: + - const: vbus + - const: osc32k + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + rtc@2b1f0000 { + compatible = "ti,am62-rtc"; + reg = <0x2b1f0000 0x100>; + interrupts = ; + power-domains = <&bar 0>; + clocks = <&foo 0>, <&foo 1>; + clock-names = "vbus", "osc32k"; + wakeup-source; + };