From patchwork Fri May 13 20:19:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 12849356 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AEC8BC433F5 for ; Fri, 13 May 2022 20:21:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lIfsQv5zUmCmRMNCcuYvozKflusfCAwuXBdfytL0tGo=; b=Up18hBQyuyi3jN MN/oKfyvQZuzZPNNuFQg7NrlW+c6Okrhnwre4FQzFq7rymWebb8jSTk5/HW4zpWz53DMAKGxY+Xmk OIC8IqjIISUY+IPfxycKDx4JOqYuSNwYRY5nRPWNuP5Dfy1ql76mTAhLPrEYw78dGLQ7OOO7qFwOp sstiUBXIdRLfljG3I/clAGiAJK8+WdO/6z8aymZv3lcWWUTPe84b8LMIR8GuYESp9jWHYCbPI2+LU ePzgToPio/unQHobeQeFlqpqNOQ74gMGlFk6e8DJ3pTo+B8vkU0cPN4s/xUudMg7A9Oyt8lwBaJtb iZpQwxErS2+VG02bJkOg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npblZ-00HQLF-Ko; Fri, 13 May 2022 20:20:01 +0000 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1npblQ-00HQFf-6t for linux-arm-kernel@lists.infradead.org; Fri, 13 May 2022 20:19:53 +0000 Received: by mail-pf1-x42f.google.com with SMTP id p8so8597168pfh.8 for ; Fri, 13 May 2022 13:19:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FvZttYhUnQZO05Iul5VPuf2RdNy/ac1Sb29Ps74XOGg=; b=dCr8d2xzcHEb/GjkcDn9ZAojzAUWLNRxE8qELtBBzGupMbxdqYogWT69eStBwGl5jO RW/+dysJ9s3y2teQTCleZMVJrs4rCsF5CaHUUx5M+SyNglRZJYdOQwIYuhTqoNA2SLw7 WTy5iEFleBmQh1Je/gcIFcHr52kRihX7K4nsVy4T7B69vKIveVi5+Aha3STUlOf9Vnbg 44JijqG1wfavkFszhpG8hunbXSYcj6k9O8GDrgsUqDjM3Ykf/dz2+4B6Zv/LOxYwhR6N XJZn+IHpGeMqpR8XAcVS6WaH8h6t7SYHxFWTz5lEBvTG1P7r2igfxg8f1ZT+8Qbqtbwu IW2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FvZttYhUnQZO05Iul5VPuf2RdNy/ac1Sb29Ps74XOGg=; b=sk4pTw5DKJj3+lStNfsW2gld3ZE6bNbaocpz9jLjiQgD9/yuBMpiuVh+OoKKefjr3Q R0N8pECmTBjTZBlidrCJBF+fh8ycCyxO63D393hQpXCM+G/pNsjEWoBueNYpVp8T0PG+ dKzcgNaq1006hdrQGP0qYzWAdZypmFPVWuqhMZhvx1pIYsEA7uT74PXiLuh9eQICPrUM OL6D6bfBG6MvYseN1T29rf1/ROn87vq9Hd5GJq4rQNqo/qC3aC3LmGXstjhLzRQnvE5K QcLZ9Mhke4kimAHbOChJCVZIrSd5HsAA3vLFYK/DhbC9LoDYfqO9b5r4tU5q7ZRmje6h 2L7A== X-Gm-Message-State: AOAM531F7cTRIOzUEZwZPGW1JtYbl8k3xvozC6vy2uonvjYZQISKgNgW KUZxRR/MUteoGaW5NyVqOPs= X-Google-Smtp-Source: ABdhPJyClCIC5/EqwKMj94z5OEHG8u3Ck8jtsh9Dt0XyeYJaiz19WQSq2NubicQM220UOeUiEumOCQ== X-Received: by 2002:a05:6a00:2181:b0:4f6:f1b1:1ba7 with SMTP id h1-20020a056a00218100b004f6f1b11ba7mr5976072pfi.73.1652473191575; Fri, 13 May 2022 13:19:51 -0700 (PDT) Received: from mail.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id b190-20020a621bc7000000b0050dc762819csm2182229pfb.118.2022.05.13.13.19.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 May 2022 13:19:51 -0700 (PDT) From: Kamal Dasu To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, alcooperx@gmail.com Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kamal Dasu Subject: [PATCH 2/2] mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0 Date: Fri, 13 May 2022 16:19:07 -0400 Message-Id: <20220513201907.36470-3-kdasu.kdev@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220513201907.36470-1-kdasu.kdev@gmail.com> References: <20220513201907.36470-1-kdasu.kdev@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220513_131952_316947_5B74A935 X-CRM114-Status: GOOD ( 17.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Al Cooper The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. The driver will need to get the clock and increase it's default rate and override the caps register, that still indicates a max of 100MHz. The new clock will be named "sdio_freq" in the DT node's "clock-names" list. The driver will use a DT property, "clock-frequency", to enable this functionality and will get the actual rate in MHz from the property to allow various speeds to be requested. Signed-off-by: Al Cooper Signed-off-by: Kamal Dasu --- drivers/mmc/host/sdhci-brcmstb.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 8eb57de48e0c..a1ffdd3f1640 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -250,6 +250,9 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host; const struct of_device_id *match; struct sdhci_brcmstb_priv *priv; + struct clk *master_clk; + u32 base_clock_hz = 0; + u32 actual_clock_mhz; struct sdhci_host *host; struct resource *iomem; struct clk *clk; @@ -330,6 +333,33 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT) host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + /* Change the base clock frequency if the DT property exists */ + if (device_property_read_u32(&pdev->dev, "max-frequency", + &base_clock_hz) != 0) + goto add_host; + + master_clk = devm_clk_get(&pdev->dev, "sdio_freq"); + if (IS_ERR(master_clk)) { + dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n"); + goto add_host; + } else { + res = clk_prepare_enable(master_clk); + if (res) + goto err; + } + + /* set improved clock rate */ + clk_set_rate(master_clk, base_clock_hz); + actual_clock_mhz = clk_get_rate(master_clk) / 1000000; + + host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK; + host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT); + /* Disable presets because they are now incorrect */ + host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; + dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n", + actual_clock_mhz); + +add_host: res = sdhci_brcmstb_add_host(host, priv); if (res) goto err;