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[31.10.206.125]) by smtp.gmail.com with ESMTPSA id t6-20020a17090616c600b00715a02874acsm4561158ejd.35.2022.06.15.04.50.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jun 2022 04:50:50 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Oleksandr Suvorov , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/18] ARM: dts: imx6q-apalis: Move pinmux groups to SoM dtsi Date: Wed, 15 Jun 2022 13:49:54 +0200 Message-Id: <20220615115006.45672-7-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220615115006.45672-1-max.oss.09@gmail.com> References: <20220615115006.45672-1-max.oss.09@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220615_045053_571511_2F84B788 X-CRM114-Status: GOOD ( 14.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Oleksandr Suvorov GPIO pinmux groups are declared on the module level. Move muxing them to the same level. It also reduces code duplication. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6q-apalis-eval.dts | 12 ------------ arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 10 ---------- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 8 -------- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 8 ++++++++ 4 files changed, 8 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index 1e6b5482a777..fe5d491e1399 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -206,15 +206,3 @@ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; status = "okay"; }; - -&iomuxc { - /* - * Mux the Apalis GPIOs - */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 - >; -}; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index 527585d26e51..8febfc0aea93 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -202,16 +202,6 @@ }; &iomuxc { - /* - * Mux the Apalis GPIOs - */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 - >; - pinctrl_leds_ixora: ledsixoragrp { fsl,pins = < MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 9900ab04fb28..78cf1d9583c1 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -205,14 +205,6 @@ }; &iomuxc { - /* Mux the Apalis GPIOs */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 - >; - pinctrl_leds_ixora: ledsixoragrp { fsl,pins = < MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index c0ae08780d86..9413c14ce5f6 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -709,6 +709,14 @@ }; &iomuxc { + /* Mux the Apalis GPIOs */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 + &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 + &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 + &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 + >; + pinctrl_apalis_gpio1: gpio2io04grp { fsl,pins = < MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0