From patchwork Wed Jun 22 15:48:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Zhongjin X-Patchwork-Id: 12891039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4EEDCCA486 for ; Wed, 22 Jun 2022 15:54:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tCQXcIo1rtvY5fMt1mMEnBiLNgjg7p4pOgdm1FRccaU=; b=Fq/r4AwHhRnFD7 0JAkp/jr2oN4ndYAYMuxdZSabOTWtBQem53+s0vaMUM2bw/1jsoiEowgdLO3+e1+tu8Ntpn0VT3JX BlGXVRQ/bMDW1bflEAjthHgon6v2SbpDdPPYuWGUD4JA8K+O2cRqE/r/6ERMmrLpq9oEMmyDiiRTu OVz5IEk2U6B/I1mWCxTO4Tao6KfQkq9TwQtgZu/gOHFSs1sJ0TpwUD1gjiO1rELMMfmadlhd9jz8I s3j2G7uSZ8l5yl41Qmvz/txwd0wR6YghjZtH2b0NbTLZGTE1LtqULqC6ir02jrAScbZaAYpaJkeHx ifaOGPnslghSpkZiyYYw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o42fB-00BHnm-95; Wed, 22 Jun 2022 15:53:05 +0000 Received: from szxga01-in.huawei.com ([45.249.212.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o42ew-00BHeG-Kz for linux-arm-kernel@lists.infradead.org; Wed, 22 Jun 2022 15:52:55 +0000 Received: from dggpemm500024.china.huawei.com (unknown [172.30.72.53]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4LSntV4jblzkWN0; Wed, 22 Jun 2022 23:51:30 +0800 (CST) Received: from dggpemm500013.china.huawei.com (7.185.36.172) by dggpemm500024.china.huawei.com (7.185.36.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 22 Jun 2022 23:52:43 +0800 Received: from ubuntu1804.huawei.com (10.67.175.36) by dggpemm500013.china.huawei.com (7.185.36.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 22 Jun 2022 23:52:43 +0800 From: Chen Zhongjin To: , , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v5 08/33] objtool: arm64: Accept non-instruction data in code sections Date: Wed, 22 Jun 2022 23:48:55 +0800 Message-ID: <20220622154920.95075-9-chenzhongjin@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220622154920.95075-1-chenzhongjin@huawei.com> References: <20220622154920.95075-1-chenzhongjin@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.175.36] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To dggpemm500013.china.huawei.com (7.185.36.172) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220622_085250_966196_9B43C6B0 X-CRM114-Status: GOOD ( 11.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The compiler can generate some '0x0' words in code sections to pad the end of functions. Also some pesudo-instructions can generate data in code sections. Mark them as INSN_NOP. If there are other undecoded instructions, just record and remove them from validation list. These doesn't influence check and orc generation because these undecoded instructions also won't be excuted. Signed-off-by: Chen Zhongjin --- tools/objtool/arch/arm64/decode.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c index 9bdd59e0d11d..37e42148dbe0 100644 --- a/tools/objtool/arch/arm64/decode.c +++ b/tools/objtool/arch/arm64/decode.c @@ -347,8 +347,15 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec switch (aarch64_get_insn_class(insn)) { case AARCH64_INSN_CLS_UNKNOWN: - WARN("can't decode instruction at %s:0x%lx", sec->name, offset); - return -1; + if (insn == 0x0) { + *type = INSN_NOP; + } else { + WARN("undecoded insn at %s:0x%lx", sec->name, offset); + return record_invalid_insn(sec, offset); + } + + break; case AARCH64_INSN_CLS_DP_IMM: /* Mov register to and from SP are aliases of add_imm */ if (aarch64_insn_is_add_imm(insn) || -- 2.17.1