diff mbox series

[v2,1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1

Message ID 20220628104138.152118-2-chanho61.park@samsung.com (mailing list archive)
State New, archived
Headers show
Series fixes for exynosautov9 clock | expand

Commit Message

Chanho Park June 28, 2022, 10:41 a.m. UTC
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
they should be defined correctly as numerical order.

Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../dt-bindings/clock/samsung,exynosautov9.h  | 56 +++++++++----------
 1 file changed, 28 insertions(+), 28 deletions(-)

Comments

Chanwoo Choi June 29, 2022, 7:35 p.m. UTC | #1
On 22. 6. 28. 19:41, Chanho Park wrote:
> There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
> they should be defined correctly as numerical order.
> 
> Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../dt-bindings/clock/samsung,exynosautov9.h  | 56 +++++++++----------
>  1 file changed, 28 insertions(+), 28 deletions(-)
> 
> diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h b/include/dt-bindings/clock/samsung,exynosautov9.h
> index ea9f91b4eb1a..a7db6516593f 100644
> --- a/include/dt-bindings/clock/samsung,exynosautov9.h
> +++ b/include/dt-bindings/clock/samsung,exynosautov9.h
> @@ -226,21 +226,21 @@
>  #define CLK_GOUT_PERIC0_IPCLK_8		28
>  #define CLK_GOUT_PERIC0_IPCLK_9		29
>  #define CLK_GOUT_PERIC0_IPCLK_10	30
> -#define CLK_GOUT_PERIC0_IPCLK_11	30
> -#define CLK_GOUT_PERIC0_PCLK_0		31
> -#define CLK_GOUT_PERIC0_PCLK_1		32
> -#define CLK_GOUT_PERIC0_PCLK_2		33
> -#define CLK_GOUT_PERIC0_PCLK_3		34
> -#define CLK_GOUT_PERIC0_PCLK_4		35
> -#define CLK_GOUT_PERIC0_PCLK_5		36
> -#define CLK_GOUT_PERIC0_PCLK_6		37
> -#define CLK_GOUT_PERIC0_PCLK_7		38
> -#define CLK_GOUT_PERIC0_PCLK_8		39
> -#define CLK_GOUT_PERIC0_PCLK_9		40
> -#define CLK_GOUT_PERIC0_PCLK_10		41
> -#define CLK_GOUT_PERIC0_PCLK_11		42
> +#define CLK_GOUT_PERIC0_IPCLK_11	31
> +#define CLK_GOUT_PERIC0_PCLK_0		32
> +#define CLK_GOUT_PERIC0_PCLK_1		33
> +#define CLK_GOUT_PERIC0_PCLK_2		34
> +#define CLK_GOUT_PERIC0_PCLK_3		35
> +#define CLK_GOUT_PERIC0_PCLK_4		36
> +#define CLK_GOUT_PERIC0_PCLK_5		37
> +#define CLK_GOUT_PERIC0_PCLK_6		38
> +#define CLK_GOUT_PERIC0_PCLK_7		39
> +#define CLK_GOUT_PERIC0_PCLK_8		40
> +#define CLK_GOUT_PERIC0_PCLK_9		41
> +#define CLK_GOUT_PERIC0_PCLK_10		42
> +#define CLK_GOUT_PERIC0_PCLK_11		43
>  
> -#define PERIC0_NR_CLK			43
> +#define PERIC0_NR_CLK			44
>  
>  /* CMU_PERIC1 */
>  #define CLK_MOUT_PERIC1_BUS_USER	1
> @@ -272,21 +272,21 @@
>  #define CLK_GOUT_PERIC1_IPCLK_8		28
>  #define CLK_GOUT_PERIC1_IPCLK_9		29
>  #define CLK_GOUT_PERIC1_IPCLK_10	30
> -#define CLK_GOUT_PERIC1_IPCLK_11	30
> -#define CLK_GOUT_PERIC1_PCLK_0		31
> -#define CLK_GOUT_PERIC1_PCLK_1		32
> -#define CLK_GOUT_PERIC1_PCLK_2		33
> -#define CLK_GOUT_PERIC1_PCLK_3		34
> -#define CLK_GOUT_PERIC1_PCLK_4		35
> -#define CLK_GOUT_PERIC1_PCLK_5		36
> -#define CLK_GOUT_PERIC1_PCLK_6		37
> -#define CLK_GOUT_PERIC1_PCLK_7		38
> -#define CLK_GOUT_PERIC1_PCLK_8		39
> -#define CLK_GOUT_PERIC1_PCLK_9		40
> -#define CLK_GOUT_PERIC1_PCLK_10		41
> -#define CLK_GOUT_PERIC1_PCLK_11		42
> +#define CLK_GOUT_PERIC1_IPCLK_11	31
> +#define CLK_GOUT_PERIC1_PCLK_0		32
> +#define CLK_GOUT_PERIC1_PCLK_1		33
> +#define CLK_GOUT_PERIC1_PCLK_2		34
> +#define CLK_GOUT_PERIC1_PCLK_3		35
> +#define CLK_GOUT_PERIC1_PCLK_4		36
> +#define CLK_GOUT_PERIC1_PCLK_5		37
> +#define CLK_GOUT_PERIC1_PCLK_6		38
> +#define CLK_GOUT_PERIC1_PCLK_7		39
> +#define CLK_GOUT_PERIC1_PCLK_8		40
> +#define CLK_GOUT_PERIC1_PCLK_9		41
> +#define CLK_GOUT_PERIC1_PCLK_10		42
> +#define CLK_GOUT_PERIC1_PCLK_11		43
>  
> -#define PERIC1_NR_CLK			43
> +#define PERIC1_NR_CLK			44
>  
>  /* CMU_PERIS */
>  #define CLK_MOUT_PERIS_BUS_USER		1

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h b/include/dt-bindings/clock/samsung,exynosautov9.h
index ea9f91b4eb1a..a7db6516593f 100644
--- a/include/dt-bindings/clock/samsung,exynosautov9.h
+++ b/include/dt-bindings/clock/samsung,exynosautov9.h
@@ -226,21 +226,21 @@ 
 #define CLK_GOUT_PERIC0_IPCLK_8		28
 #define CLK_GOUT_PERIC0_IPCLK_9		29
 #define CLK_GOUT_PERIC0_IPCLK_10	30
-#define CLK_GOUT_PERIC0_IPCLK_11	30
-#define CLK_GOUT_PERIC0_PCLK_0		31
-#define CLK_GOUT_PERIC0_PCLK_1		32
-#define CLK_GOUT_PERIC0_PCLK_2		33
-#define CLK_GOUT_PERIC0_PCLK_3		34
-#define CLK_GOUT_PERIC0_PCLK_4		35
-#define CLK_GOUT_PERIC0_PCLK_5		36
-#define CLK_GOUT_PERIC0_PCLK_6		37
-#define CLK_GOUT_PERIC0_PCLK_7		38
-#define CLK_GOUT_PERIC0_PCLK_8		39
-#define CLK_GOUT_PERIC0_PCLK_9		40
-#define CLK_GOUT_PERIC0_PCLK_10		41
-#define CLK_GOUT_PERIC0_PCLK_11		42
+#define CLK_GOUT_PERIC0_IPCLK_11	31
+#define CLK_GOUT_PERIC0_PCLK_0		32
+#define CLK_GOUT_PERIC0_PCLK_1		33
+#define CLK_GOUT_PERIC0_PCLK_2		34
+#define CLK_GOUT_PERIC0_PCLK_3		35
+#define CLK_GOUT_PERIC0_PCLK_4		36
+#define CLK_GOUT_PERIC0_PCLK_5		37
+#define CLK_GOUT_PERIC0_PCLK_6		38
+#define CLK_GOUT_PERIC0_PCLK_7		39
+#define CLK_GOUT_PERIC0_PCLK_8		40
+#define CLK_GOUT_PERIC0_PCLK_9		41
+#define CLK_GOUT_PERIC0_PCLK_10		42
+#define CLK_GOUT_PERIC0_PCLK_11		43
 
-#define PERIC0_NR_CLK			43
+#define PERIC0_NR_CLK			44
 
 /* CMU_PERIC1 */
 #define CLK_MOUT_PERIC1_BUS_USER	1
@@ -272,21 +272,21 @@ 
 #define CLK_GOUT_PERIC1_IPCLK_8		28
 #define CLK_GOUT_PERIC1_IPCLK_9		29
 #define CLK_GOUT_PERIC1_IPCLK_10	30
-#define CLK_GOUT_PERIC1_IPCLK_11	30
-#define CLK_GOUT_PERIC1_PCLK_0		31
-#define CLK_GOUT_PERIC1_PCLK_1		32
-#define CLK_GOUT_PERIC1_PCLK_2		33
-#define CLK_GOUT_PERIC1_PCLK_3		34
-#define CLK_GOUT_PERIC1_PCLK_4		35
-#define CLK_GOUT_PERIC1_PCLK_5		36
-#define CLK_GOUT_PERIC1_PCLK_6		37
-#define CLK_GOUT_PERIC1_PCLK_7		38
-#define CLK_GOUT_PERIC1_PCLK_8		39
-#define CLK_GOUT_PERIC1_PCLK_9		40
-#define CLK_GOUT_PERIC1_PCLK_10		41
-#define CLK_GOUT_PERIC1_PCLK_11		42
+#define CLK_GOUT_PERIC1_IPCLK_11	31
+#define CLK_GOUT_PERIC1_PCLK_0		32
+#define CLK_GOUT_PERIC1_PCLK_1		33
+#define CLK_GOUT_PERIC1_PCLK_2		34
+#define CLK_GOUT_PERIC1_PCLK_3		35
+#define CLK_GOUT_PERIC1_PCLK_4		36
+#define CLK_GOUT_PERIC1_PCLK_5		37
+#define CLK_GOUT_PERIC1_PCLK_6		38
+#define CLK_GOUT_PERIC1_PCLK_7		39
+#define CLK_GOUT_PERIC1_PCLK_8		40
+#define CLK_GOUT_PERIC1_PCLK_9		41
+#define CLK_GOUT_PERIC1_PCLK_10		42
+#define CLK_GOUT_PERIC1_PCLK_11		43
 
-#define PERIC1_NR_CLK			43
+#define PERIC1_NR_CLK			44
 
 /* CMU_PERIS */
 #define CLK_MOUT_PERIS_BUS_USER		1