| Message ID | 20220628221404.1444200-3-sean.anderson@seco.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | net: dpaa: Convert to phylink | expand |
On Tue, 28 Jun 2022 18:13:31 -0400, Sean Anderson wrote: > This converts the MAC portion of the FMan MAC bindings to yaml. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > Changes in v2: > - New > > .../bindings/net/fsl,fman-dtsec.yaml | 144 ++++++++++++++++++ > .../devicetree/bindings/net/fsl-fman.txt | 128 +--------------- > 2 files changed, 145 insertions(+), 127 deletions(-) > create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml: patternProperties:^thermistor@:properties:adi,excitation-current-nanoamp: '$ref' should not be valid under {'const': '$ref'} hint: Standard unit suffix properties don't need a type $ref from schema $id: http://devicetree.org/meta-schemas/core.yaml# /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml: ignoring, error in schema: patternProperties: ^thermistor@: properties: adi,excitation-current-nanoamp Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.example.dtb:0:0: /example-0/spi/ltc2983@0: failed to match any schema with compatible: ['adi,ltc2983'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Tue, Jun 28, 2022 at 06:13:31PM -0400, Sean Anderson wrote: > This converts the MAC portion of the FMan MAC bindings to yaml. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > Changes in v2: > - New > > .../bindings/net/fsl,fman-dtsec.yaml | 144 ++++++++++++++++++ > .../devicetree/bindings/net/fsl-fman.txt | 128 +--------------- > 2 files changed, 145 insertions(+), 127 deletions(-) > create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml > > diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml > new file mode 100644 > index 000000000000..809df1589f20 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml > @@ -0,0 +1,144 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP FMan MAC > + > +maintainers: > + - Madalin Bucur <madalin.bucur@nxp.com> > + > +description: | > + Each FMan has several MACs, each implementing an Ethernet interface. Earlier > + versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for > + 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller > + (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate > + Ethernet Media Access Controller (mEMAC) to handle all speeds. > + > +properties: > + compatible: > + enum: > + - fsl,fman-dtsec > + - fsl,fman-xgec > + - fsl,fman-memac > + > + cell-index: > + maximum: 64 > + description: | > + FManV2: > + register[bit] MAC cell-index > + ============================================================ > + FM_EPI[16] XGEC 8 > + FM_EPI[16+n] dTSECn n-1 > + FM_NPI[11+n] dTSECn n-1 > + n = 1,..,5 > + > + FManV3: > + register[bit] MAC cell-index > + ============================================================ > + FM_EPI[16+n] mEMACn n-1 > + FM_EPI[25] mEMAC10 9 > + > + FM_NPI[11+n] mEMACn n-1 > + FM_NPI[10] mEMAC10 9 > + FM_NPI[11] mEMAC9 8 > + n = 1,..8 > + > + FM_EPI and FM_NPI are located in the FMan memory map. > + > + 2. SoC registers: > + > + - P2041, P3041, P4080 P5020, P5040: > + register[bit] FMan MAC cell > + Unit index > + ============================================================ > + DCFG_DEVDISR2[7] 1 XGEC 8 > + DCFG_DEVDISR2[7+n] 1 dTSECn n-1 > + DCFG_DEVDISR2[15] 2 XGEC 8 > + DCFG_DEVDISR2[15+n] 2 dTSECn n-1 > + n = 1,..5 > + > + - T1040, T2080, T4240, B4860: > + register[bit] FMan MAC cell > + Unit index > + ============================================================ > + DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 > + DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 > + n = 1,..6,9,10 > + > + EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in > + the specific SoC "Device Configuration/Pin Control" Memory > + Map. > + > + reg: > + maxItems: 1 > + > + fsl,fman-ports: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + maxItems: 2 > + description: | > + An array of two references: the first is the FMan RX port and the second > + is the TX port used by this MAC. > + > + ptp-timer: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: A reference to the IEEE1588 timer > + > + pcsphy-handle: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: A reference to the PCS (typically found on the SerDes) This description includes ethernet-controller.yaml, which contains: pcs-handle: $ref: /schemas/types.yaml#/definitions/phandle description: Specifies a reference to a node representing a PCS PHY device on a MDIO bus to link with an external PHY (phy-handle) if exists. Is there a reason why a custom property is needed rather than using the pcs-handle property already provided by the ethernet-controller DT description? Thanks.
Hi Russell, On 6/29/22 10:50 AM, Russell King (Oracle) wrote: > On Tue, Jun 28, 2022 at 06:13:31PM -0400, Sean Anderson wrote: >> This converts the MAC portion of the FMan MAC bindings to yaml. >> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com> >> --- >> >> Changes in v2: >> - New >> >> .../bindings/net/fsl,fman-dtsec.yaml | 144 ++++++++++++++++++ >> .../devicetree/bindings/net/fsl-fman.txt | 128 +--------------- >> 2 files changed, 145 insertions(+), 127 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml >> >> diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml >> new file mode 100644 >> index 000000000000..809df1589f20 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml >> @@ -0,0 +1,144 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: NXP FMan MAC >> + >> +maintainers: >> + - Madalin Bucur <madalin.bucur@nxp.com> >> + >> +description: | >> + Each FMan has several MACs, each implementing an Ethernet interface. Earlier >> + versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for >> + 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller >> + (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate >> + Ethernet Media Access Controller (mEMAC) to handle all speeds. >> + >> +properties: >> + compatible: >> + enum: >> + - fsl,fman-dtsec >> + - fsl,fman-xgec >> + - fsl,fman-memac >> + >> + cell-index: >> + maximum: 64 >> + description: | >> + FManV2: >> + register[bit] MAC cell-index >> + ============================================================ >> + FM_EPI[16] XGEC 8 >> + FM_EPI[16+n] dTSECn n-1 >> + FM_NPI[11+n] dTSECn n-1 >> + n = 1,..,5 >> + >> + FManV3: >> + register[bit] MAC cell-index >> + ============================================================ >> + FM_EPI[16+n] mEMACn n-1 >> + FM_EPI[25] mEMAC10 9 >> + >> + FM_NPI[11+n] mEMACn n-1 >> + FM_NPI[10] mEMAC10 9 >> + FM_NPI[11] mEMAC9 8 >> + n = 1,..8 >> + >> + FM_EPI and FM_NPI are located in the FMan memory map. >> + >> + 2. SoC registers: >> + >> + - P2041, P3041, P4080 P5020, P5040: >> + register[bit] FMan MAC cell >> + Unit index >> + ============================================================ >> + DCFG_DEVDISR2[7] 1 XGEC 8 >> + DCFG_DEVDISR2[7+n] 1 dTSECn n-1 >> + DCFG_DEVDISR2[15] 2 XGEC 8 >> + DCFG_DEVDISR2[15+n] 2 dTSECn n-1 >> + n = 1,..5 >> + >> + - T1040, T2080, T4240, B4860: >> + register[bit] FMan MAC cell >> + Unit index >> + ============================================================ >> + DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 >> + DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 >> + n = 1,..6,9,10 >> + >> + EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in >> + the specific SoC "Device Configuration/Pin Control" Memory >> + Map. >> + >> + reg: >> + maxItems: 1 >> + >> + fsl,fman-ports: >> + $ref: /schemas/types.yaml#/definitions/phandle-array >> + maxItems: 2 >> + description: | >> + An array of two references: the first is the FMan RX port and the second >> + is the TX port used by this MAC. >> + >> + ptp-timer: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: A reference to the IEEE1588 timer >> + >> + pcsphy-handle: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: A reference to the PCS (typically found on the SerDes) > > This description includes ethernet-controller.yaml, which contains: > > pcs-handle: > $ref: /schemas/types.yaml#/definitions/phandle > description: > Specifies a reference to a node representing a PCS PHY device on a MDIO > bus to link with an external PHY (phy-handle) if exists. > > Is there a reason why a custom property is needed rather than using the > pcs-handle property already provided by the ethernet-controller DT > description? This is the existing property name. It must remain the same for backwards compatibility. c.f. tbi-handle. --Sean
On Tue, 28 Jun 2022 18:13:31 -0400, Sean Anderson wrote: > This converts the MAC portion of the FMan MAC bindings to yaml. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > Changes in v2: > - New > > .../bindings/net/fsl,fman-dtsec.yaml | 144 ++++++++++++++++++ > .../devicetree/bindings/net/fsl-fman.txt | 128 +--------------- > 2 files changed, 145 insertions(+), 127 deletions(-) > create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml new file mode 100644 index 000000000000..809df1589f20 --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml @@ -0,0 +1,144 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP FMan MAC + +maintainers: + - Madalin Bucur <madalin.bucur@nxp.com> + +description: | + Each FMan has several MACs, each implementing an Ethernet interface. Earlier + versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for + 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller + (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate + Ethernet Media Access Controller (mEMAC) to handle all speeds. + +properties: + compatible: + enum: + - fsl,fman-dtsec + - fsl,fman-xgec + - fsl,fman-memac + + cell-index: + maximum: 64 + description: | + FManV2: + register[bit] MAC cell-index + ============================================================ + FM_EPI[16] XGEC 8 + FM_EPI[16+n] dTSECn n-1 + FM_NPI[11+n] dTSECn n-1 + n = 1,..,5 + + FManV3: + register[bit] MAC cell-index + ============================================================ + FM_EPI[16+n] mEMACn n-1 + FM_EPI[25] mEMAC10 9 + + FM_NPI[11+n] mEMACn n-1 + FM_NPI[10] mEMAC10 9 + FM_NPI[11] mEMAC9 8 + n = 1,..8 + + FM_EPI and FM_NPI are located in the FMan memory map. + + 2. SoC registers: + + - P2041, P3041, P4080 P5020, P5040: + register[bit] FMan MAC cell + Unit index + ============================================================ + DCFG_DEVDISR2[7] 1 XGEC 8 + DCFG_DEVDISR2[7+n] 1 dTSECn n-1 + DCFG_DEVDISR2[15] 2 XGEC 8 + DCFG_DEVDISR2[15+n] 2 dTSECn n-1 + n = 1,..5 + + - T1040, T2080, T4240, B4860: + register[bit] FMan MAC cell + Unit index + ============================================================ + DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 + DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 + n = 1,..6,9,10 + + EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in + the specific SoC "Device Configuration/Pin Control" Memory + Map. + + reg: + maxItems: 1 + + fsl,fman-ports: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 2 + description: | + An array of two references: the first is the FMan RX port and the second + is the TX port used by this MAC. + + ptp-timer: + $ref: /schemas/types.yaml#/definitions/phandle + description: A reference to the IEEE1588 timer + + pcsphy-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: A reference to the PCS (typically found on the SerDes) + + tbi-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: A reference to the (TBI-based) PCS + +required: + - compatible + - cell-index + - reg + - fsl,fman-ports + - ptp-timer + +allOf: + - $ref: "ethernet-controller.yaml#" + - if: + properties: + compatible: + contains: + const: fsl,fman-dtsec + then: + required: + - tbi-handle + - if: + properties: + compatible: + contains: + const: fsl,fman-memac + then: + required: + - pcsphy-handle + +unevaluatedProperties: false + +examples: + - | + ethernet@e0000 { + compatible = "fsl,fman-dtsec"; + cell-index = <0>; + reg = <0xe0000 0x1000>; + fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; + ptp-timer = <&ptp_timer>; + tbi-handle = <&tbi0>; + }; + - | + ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,fman-memac"; + reg = <0xe8000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy4>; + phy-handle = <&sgmii_phy1>; + phy-connection-type = "sgmii"; + }; diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt index 801efc7d6818..b9055335db3b 100644 --- a/Documentation/devicetree/bindings/net/fsl-fman.txt +++ b/Documentation/devicetree/bindings/net/fsl-fman.txt @@ -232,133 +232,7 @@ port@81000 { ============================================================================= FMan dTSEC/XGEC/mEMAC Node -DESCRIPTION - -mEMAC/dTSEC/XGEC are the Ethernet network interfaces - -PROPERTIES - -- compatible - Usage: required - Value type: <stringlist> - Definition: A standard property. - Must include one of the following: - - "fsl,fman-dtsec" for dTSEC MAC - - "fsl,fman-xgec" for XGEC MAC - - "fsl,fman-memac" for mEMAC MAC - -- cell-index - Usage: required - Value type: <u32> - Definition: Specifies the MAC id. - - The cell-index value may be used by the FMan or the SoC, to - identify the MAC unit in the FMan (or SoC) memory map. - In the tables below there's a description of the cell-index - use, there are two tables, one describes the use of cell-index - by the FMan, the second describes the use by the SoC: - - 1. FMan Registers - - FManV2: - register[bit] MAC cell-index - ============================================================ - FM_EPI[16] XGEC 8 - FM_EPI[16+n] dTSECn n-1 - FM_NPI[11+n] dTSECn n-1 - n = 1,..,5 - - FManV3: - register[bit] MAC cell-index - ============================================================ - FM_EPI[16+n] mEMACn n-1 - FM_EPI[25] mEMAC10 9 - - FM_NPI[11+n] mEMACn n-1 - FM_NPI[10] mEMAC10 9 - FM_NPI[11] mEMAC9 8 - n = 1,..8 - - FM_EPI and FM_NPI are located in the FMan memory map. - - 2. SoC registers: - - - P2041, P3041, P4080 P5020, P5040: - register[bit] FMan MAC cell - Unit index - ============================================================ - DCFG_DEVDISR2[7] 1 XGEC 8 - DCFG_DEVDISR2[7+n] 1 dTSECn n-1 - DCFG_DEVDISR2[15] 2 XGEC 8 - DCFG_DEVDISR2[15+n] 2 dTSECn n-1 - n = 1,..5 - - - T1040, T2080, T4240, B4860: - register[bit] FMan MAC cell - Unit index - ============================================================ - DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 - DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 - n = 1,..6,9,10 - - EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in - the specific SoC "Device Configuration/Pin Control" Memory - Map. - -- reg - Usage: required - Value type: <prop-encoded-array> - Definition: A standard property. - -- fsl,fman-ports - Usage: required - Value type: <prop-encoded-array> - Definition: An array of two phandles - the first references is - the FMan RX port and the second is the TX port used by this - MAC. - -- ptp-timer - Usage required - Value type: <phandle> - Definition: A phandle for 1EEE1588 timer. - -- pcsphy-handle - Usage required for "fsl,fman-memac" MACs - Value type: <phandle> - Definition: A phandle for pcsphy. - -- tbi-handle - Usage required for "fsl,fman-dtsec" MACs - Value type: <phandle> - Definition: A phandle for tbiphy. - -EXAMPLE - -fman1_tx28: port@a8000 { - cell-index = <0x28>; - compatible = "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; -}; - -fman1_rx8: port@88000 { - cell-index = <0x8>; - compatible = "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; -}; - -ptp-timer: ptp_timer@fe000 { - compatible = "fsl,fman-ptp-timer"; - reg = <0xfe000 0x1000>; -}; - -ethernet@e0000 { - compatible = "fsl,fman-dtsec"; - cell-index = <0>; - reg = <0xe0000 0x1000>; - fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; - ptp-timer = <&ptp-timer>; - tbi-handle = <&tbi0>; -}; +Refer to Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml ============================================================================ FMan IEEE 1588 Node
This converts the MAC portion of the FMan MAC bindings to yaml. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- Changes in v2: - New .../bindings/net/fsl,fman-dtsec.yaml | 144 ++++++++++++++++++ .../devicetree/bindings/net/fsl-fman.txt | 128 +--------------- 2 files changed, 145 insertions(+), 127 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml