diff mbox series

[2/3] arm64: dts: exynosautov9: add exynosautov9-usi.dtsi

Message ID 20220629015650.138527-3-chanho61.park@samsung.com (mailing list archive)
State New, archived
Headers show
Series support USI for Exynos Auto v9 SoC | expand

Commit Message

Chanho Park June 29, 2022, 1:56 a.m. UTC 
Universal Serial Interface (USI) supports three types of serial interface
such as Universal Asynchronous Receiver and Transmitter (UART), Serial
Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C).
Each protocols can be working independently and configured as one of
those using external configuration inputs.
Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c
and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode.
So, we can define one USI node that includes serial/spi and hsi2c.
usi_i2c nodes can be used only for i2c mode.

We can have below combinations for one USI.
1) The usi node is used either 4 pin uart or 4 pin spi
 -> No usi_i2c can be used
2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL)
 -> usi_i2c should be enabled to use the latter i2c
3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL)
 -> usi_i2c should be enabled to use the latter i2c

By default, all USIs are initially set to uart mode by below setting.
samsung,mode = <USI_V2_UART>;
You can change it either USI_V2_SPI or USI_V2_I2C.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../boot/dts/exynos/exynosautov9-usi.dtsi     | 1127 +++++++++++++++++
 1 file changed, 1127 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi

Comments

Krzysztof Kozlowski June 29, 2022, 8:40 a.m. UTC | #1 
On 29/06/2022 03:56, Chanho Park wrote:
> Universal Serial Interface (USI) supports three types of serial interface
> such as Universal Asynchronous Receiver and Transmitter (UART), Serial
> Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C).
> Each protocols can be working independently and configured as one of
> those using external configuration inputs.
> Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c
> and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode.
> So, we can define one USI node that includes serial/spi and hsi2c.
> usi_i2c nodes can be used only for i2c mode.
> 
> We can have below combinations for one USI.
> 1) The usi node is used either 4 pin uart or 4 pin spi
>  -> No usi_i2c can be used
> 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL)
>  -> usi_i2c should be enabled to use the latter i2c
> 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL)
>  -> usi_i2c should be enabled to use the latter i2c
> 
> By default, all USIs are initially set to uart mode by below setting.
> samsung,mode = <USI_V2_UART>;
> You can change it either USI_V2_SPI or USI_V2_I2C.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../boot/dts/exynos/exynosautov9-usi.dtsi     | 1127 +++++++++++++++++
>  1 file changed, 1127 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi

Put all this directly in exynosautov9.dtsi, because this is not a
re-usable piece among different DTSI.

> 
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
> new file mode 100644
> index 000000000000..0e4c6332770b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
> @@ -0,0 +1,1127 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's ExynosAutov9 SoC USI device tree source
> + *
> + * Copyright (c) 2022 Samsung Electronics Co., Ltd.
> + *
> + * Samsung's ExynosAutov9 SoC USI(Universal Serial Interface, uart/spi/i2c)
> + * are listed as device tree nodes in this file.
> + */
> +
> +/* PERIC0 USIs */
> +&soc {
> +	syscon_peric0: syscon@10220000 {
> +		compatible = "samsung,exynosautov9-sysreg", "syscon";
> +		reg = <0x10220000 0x2000>;
> +	};
> +
> +	usi_0: usi@103000c0 {
> +		compatible = "samsung,exynos850-usi";

We should start adding dedicated compatible, so:
"samsung,exynosautov9-usi", "samsung,exynos850-usi"

> +		reg = <0x103000c0 0x20>;
> +		samsung,sysreg = <&syscon_peric0 0x1000>;
> +		samsung,mode = <USI_V2_UART>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
> +			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
> +		clock-names = "pclk", "ipclk";
> +		status = "disabled";
> +
> +		/* USI: UART */

Skip the comments, they are obvious from device node name. Long time ago
I was not advocating this, but I see it's benefits - much easier to
introduce changes to DTS or binding in case of some differences.

> +		serial_0: serial@10300000 {
> +			compatible = "samsung,exynos850-uart";

Here as well.

> +			reg = <0x10300000 0xc0>;
> +			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&uart0_bus>;
> +			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
> +				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
> +			clock-names = "uart", "clk_uart_baud0";
> +			samsung,uart-fifosize = <256>;
> +			status = "disabled";
> +		};
> +
> +		/* USI: SPI */
> +		spi_0: spi@10300000 {
> +			compatible = "samsung,exynosautov9-spi";
> +			reg = <0x10300000 0x30>;
> +			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&spi0_bus &spi0_cs_func>;
> +			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
> +				 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>,
> +				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
> +			clock-names = "spi", "spi_busclk0", "spi_ioclk";
> +			samsung,spi-src-clk = <0>;
> +			dmas = <&pdma0 1 &pdma0 0>;

These are two separate phandles <>, not one.

> +			dma-names = "tx", "rx";
> +			num-cs = <1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		/* USI: I2C */
> +		hsi2c_0: hsi2c@10300000 {
> +			compatible = "samsung,exynosautov9-hsi2c";
> +			reg = <0x10300000 0xc0>;
> +			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&hsi2c0_bus>;
> +			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
> +				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
> +			clock-names = "hsi2c", "hsi2c_pclk";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +	};




Best regards,
Krzysztof
Chanho Park June 29, 2022, 9:47 a.m. UTC | #2 
> On 29/06/2022 03:56, Chanho Park wrote:
> > Universal Serial Interface (USI) supports three types of serial
> > interface such as Universal Asynchronous Receiver and Transmitter
> > (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit
> (I2C).
> > Each protocols can be working independently and configured as one of
> > those using external configuration inputs.
> > Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as
> > i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode.
> > So, we can define one USI node that includes serial/spi and hsi2c.
> > usi_i2c nodes can be used only for i2c mode.
> >
> > We can have below combinations for one USI.
> > 1) The usi node is used either 4 pin uart or 4 pin spi  -> No usi_i2c
> > can be used
> > 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL)  -> usi_i2c
> > should be enabled to use the latter i2c
> > 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL)  -> usi_i2c
> > should be enabled to use the latter i2c
> >
> > By default, all USIs are initially set to uart mode by below setting.
> > samsung,mode = <USI_V2_UART>;
> > You can change it either USI_V2_SPI or USI_V2_I2C.
> >
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> > ---
> >  .../boot/dts/exynos/exynosautov9-usi.dtsi     | 1127 +++++++++++++++++
> >  1 file changed, 1127 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
> 
> Put all this directly in exynosautov9.dtsi, because this is not a re-
> usable piece among different DTSI.

Okay. I'll move them in the exynosautov9.dtsi. I thought they're too long to put in the exynosautov9.dtsi and I also found a similar case such as exynos5433-bus.dtsi and exynos5433-tmu.dtsi.

> 
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
> > b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
> > new file mode 100644
> > index 000000000000..0e4c6332770b
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
> > @@ -0,0 +1,1127 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Samsung's ExynosAutov9 SoC USI device tree source
> > + *
> > + * Copyright (c) 2022 Samsung Electronics Co., Ltd.
> > + *
> > + * Samsung's ExynosAutov9 SoC USI(Universal Serial Interface,
> > +uart/spi/i2c)
> > + * are listed as device tree nodes in this file.
> > + */
> > +
> > +/* PERIC0 USIs */
> > +&soc {
> > +	syscon_peric0: syscon@10220000 {
> > +		compatible = "samsung,exynosautov9-sysreg", "syscon";
> > +		reg = <0x10220000 0x2000>;
> > +	};
> > +
> > +	usi_0: usi@103000c0 {
> > +		compatible = "samsung,exynos850-usi";
> 
> We should start adding dedicated compatible, so:
> "samsung,exynosautov9-usi", "samsung,exynos850-usi"

So, I need to add the compatible to the Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml, right?

- samsung,exynos850-usi   # for USIv2 (Exynos850, ExynosAutoV9)

To be>
- samsung,exynos850-usi
- samsung,exynosautov9-usi

> 
> > +		reg = <0x103000c0 0x20>;
> > +		samsung,sysreg = <&syscon_peric0 0x1000>;
> > +		samsung,mode = <USI_V2_UART>;
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +		ranges;
> > +		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
> > +			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
> > +		clock-names = "pclk", "ipclk";
> > +		status = "disabled";
> > +
> > +		/* USI: UART */
> 
> Skip the comments, they are obvious from device node name. Long time ago I
> was not advocating this, but I see it's benefits - much easier to
> introduce changes to DTS or binding in case of some differences.

I'll drop them.

> 
> > +		serial_0: serial@10300000 {
> > +			compatible = "samsung,exynos850-uart";
> 
> Here as well.

I'll add "samsung,exynosautov9-uart" to the yaml file.

> 
> > +			reg = <0x10300000 0xc0>;
> > +			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> > +			pinctrl-names = "default";
> > +			pinctrl-0 = <&uart0_bus>;
> > +			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
> > +				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
> > +			clock-names = "uart", "clk_uart_baud0";
> > +			samsung,uart-fifosize = <256>;
> > +			status = "disabled";
> > +		};
> > +
> > +		/* USI: SPI */
> > +		spi_0: spi@10300000 {
> > +			compatible = "samsung,exynosautov9-spi";
> > +			reg = <0x10300000 0x30>;
> > +			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> > +			pinctrl-names = "default";
> > +			pinctrl-0 = <&spi0_bus &spi0_cs_func>;
> > +			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
> > +				 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>,
> > +				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
> > +			clock-names = "spi", "spi_busclk0", "spi_ioclk";
> > +			samsung,spi-src-clk = <0>;
> > +			dmas = <&pdma0 1 &pdma0 0>;
> 
> These are two separate phandles <>, not one.

I'll separate it.

Best Regards,
Chanho Park
Krzysztof Kozlowski June 29, 2022, 11:09 a.m. UTC | #3 
On 29/06/2022 11:47, Chanho Park wrote:
>> On 29/06/2022 03:56, Chanho Park wrote:
>>> Universal Serial Interface (USI) supports three types of serial
>>> interface such as Universal Asynchronous Receiver and Transmitter
>>> (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit
>> (I2C).
>>> Each protocols can be working independently and configured as one of
>>> those using external configuration inputs.
>>> Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as
>>> i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode.
>>> So, we can define one USI node that includes serial/spi and hsi2c.
>>> usi_i2c nodes can be used only for i2c mode.
>>>
>>> We can have below combinations for one USI.
>>> 1) The usi node is used either 4 pin uart or 4 pin spi  -> No usi_i2c
>>> can be used
>>> 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL)  -> usi_i2c
>>> should be enabled to use the latter i2c
>>> 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL)  -> usi_i2c
>>> should be enabled to use the latter i2c
>>>
>>> By default, all USIs are initially set to uart mode by below setting.
>>> samsung,mode = <USI_V2_UART>;
>>> You can change it either USI_V2_SPI or USI_V2_I2C.
>>>
>>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>>> ---
>>>  .../boot/dts/exynos/exynosautov9-usi.dtsi     | 1127 +++++++++++++++++
>>>  1 file changed, 1127 insertions(+)
>>>  create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
>>
>> Put all this directly in exynosautov9.dtsi, because this is not a re-
>> usable piece among different DTSI.
> 
> Okay. I'll move them in the exynosautov9.dtsi. I thought they're too long to put in the exynosautov9.dtsi and I also found a similar case such as exynos5433-bus.dtsi and exynos5433-tmu.dtsi.

Indeed we did like that... The tmu maybe was meant to be re-used,
although it references specific clusters. But the split of bus I don't
understand - it does not help.

I don't think it improved readability.

> 
>>
>>>
>>> diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
>>> b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
>>> new file mode 100644
>>> index 000000000000..0e4c6332770b
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
>>> @@ -0,0 +1,1127 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * Samsung's ExynosAutov9 SoC USI device tree source
>>> + *
>>> + * Copyright (c) 2022 Samsung Electronics Co., Ltd.
>>> + *
>>> + * Samsung's ExynosAutov9 SoC USI(Universal Serial Interface,
>>> +uart/spi/i2c)
>>> + * are listed as device tree nodes in this file.
>>> + */
>>> +
>>> +/* PERIC0 USIs */
>>> +&soc {
>>> +	syscon_peric0: syscon@10220000 {
>>> +		compatible = "samsung,exynosautov9-sysreg", "syscon";
>>> +		reg = <0x10220000 0x2000>;
>>> +	};
>>> +
>>> +	usi_0: usi@103000c0 {
>>> +		compatible = "samsung,exynos850-usi";
>>
>> We should start adding dedicated compatible, so:
>> "samsung,exynosautov9-usi", "samsung,exynos850-usi"
> 
> So, I need to add the compatible to the Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml, right?
> 
> - samsung,exynos850-usi   # for USIv2 (Exynos850, ExynosAutoV9)
> 
> To be>
> - samsung,exynos850-usi
> - samsung,exynosautov9-usi


  compatible:

    oneOf:
     - items:
         - const: samsung,exynosautov9-usi
         - const: samsung,exynos850-usi
     - enum:

         - samsung,exynos850-usi   # for USIv2 (Exynos850, ExynosAutoV9)

> 
>>
>>> +		reg = <0x103000c0 0x20>;
>>> +		samsung,sysreg = <&syscon_peric0 0x1000>;
>>> +		samsung,mode = <USI_V2_UART>;
>>> +		#address-cells = <1>;
>>> +		#size-cells = <1>;
>>> +		ranges;
>>> +		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
>>> +			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
>>> +		clock-names = "pclk", "ipclk";
>>> +		status = "disabled";
>>> +
>>> +		/* USI: UART */
>>
>> Skip the comments, they are obvious from device node name. Long time ago I
>> was not advocating this, but I see it's benefits - much easier to
>> introduce changes to DTS or binding in case of some differences.

Eh, I think my reply got mixed up. The last sentence was about
compatible, so it should be:

We should start adding dedicated compatible, so:
"samsung,exynosautov9-usi", "samsung,exynos850-usi".
Long time ago I was not advocating this, but I see it's benefits - much
easier to introduce changes to DTS or binding in case of some differences.

and here only about the comment.

> I'll drop them.

Yes, please.

> 
>>
>>> +		serial_0: serial@10300000 {
>>> +			compatible = "samsung,exynos850-uart";
>>
>> Here as well.
> 
> I'll add "samsung,exynosautov9-uart" to the yaml file.
> 
>>

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
new file mode 100644
index 000000000000..0e4c6332770b
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov9-usi.dtsi
@@ -0,0 +1,1127 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAutov9 SoC USI device tree source
+ *
+ * Copyright (c) 2022 Samsung Electronics Co., Ltd.
+ *
+ * Samsung's ExynosAutov9 SoC USI(Universal Serial Interface, uart/spi/i2c)
+ * are listed as device tree nodes in this file.
+ */
+
+/* PERIC0 USIs */
+&soc {
+	syscon_peric0: syscon@10220000 {
+		compatible = "samsung,exynosautov9-sysreg", "syscon";
+		reg = <0x10220000 0x2000>;
+	};
+
+	usi_0: usi@103000c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103000c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1000>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_0: serial@10300000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10300000 0xc0>;
+			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart0_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_0: spi@10300000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10300000 0x30>;
+			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi0_bus &spi0_cs_func>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
+				 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 1 &pdma0 0>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_0: hsi2c@10300000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10300000 0xc0>;
+			interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c0_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_0: usi@103100c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103100c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1004>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_1: hsi2c@10310000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10310000 0xc0>;
+			interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c1_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_1: usi@103200c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103200c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1008>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_1: serial@10320000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10320000 0xc0>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart1_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_1: spi@10320000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10320000 0x30>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi1_bus &spi1_cs_func>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
+				 <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 3 &pdma0 2>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_2: hsi2c@10320000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10320000 0xc0>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c2_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_1: usi@103300c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103300c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x100c>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_3: hsi2c@10330000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10330000 0xc0>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c3_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_2: usi@103400c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103400c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1010>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_2: serial@10340000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10340000 0xc0>;
+			interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart2_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_2: spi@10340000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10340000 0x30>;
+			interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi2_bus &spi2_cs_func>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
+				 <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 5 &pdma0 4>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_4: hsi2c@10340000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10340000 0xc0>;
+			interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c4_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_2: usi@103500c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103500c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1014>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_5: hsi2c@10350000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10350000 0xc0>;
+			interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c5_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_3: usi@103600c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103600c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1018>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_3: serial@10360000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10360000 0xc0>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart3_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_3: spi@10360000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10360000 0x30>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi3_bus &spi3_cs_func>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
+				 <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 7 &pdma0 6>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_6: hsi2c@10360000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10360000 0xc0>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c6_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_3: usi@103700c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103700c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x101c>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_7: hsi2c@10370000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10370000 0xc0>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c7_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_4: usi@103800c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103800c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1020>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_4: serial@10380000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10380000 0xc0>;
+			interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart4_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_4: spi@10380000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10380000 0x30>;
+			interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi4_bus &spi4_cs_func>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
+				 <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 9 &pdma0 8>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_8: hsi2c@10380000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10380000 0xc0>;
+			interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c8_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_4: usi@103900c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103900c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1024>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_9: hsi2c@10390000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10390000 0xc0>;
+			interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c9_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_5: usi@103a00c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103a00c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x1028>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_5: serial@103a0000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x103a0000 0xc0>;
+			interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart5_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_5: spi@103a0000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x103a0000 0x30>;
+			interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi5_bus &spi5_cs_func>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
+				 <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 11 &pdma0 10>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_10: hsi2c@103a0000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x103a0000 0xc0>;
+			interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c10_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_5: usi@103b00c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x103b00c0 0x20>;
+		samsung,sysreg = <&syscon_peric0 0x102c>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>,
+			 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_11: hsi2c@103b0000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x103b0000 0xc0>;
+			interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c11_bus>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+};
+
+/* PERIC1 USIs */
+&soc {
+	syscon_peric1: syscon@10820000 {
+		compatible = "samsung,exynosautov9-sysreg", "syscon";
+		reg = <0x10820000 0x2000>;
+	};
+
+	usi_6: usi@109000c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109000c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1000>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_6: serial@10900000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10900000 0xc0>;
+			interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart6_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_6: spi@10900000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10900000 0x30>;
+			interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi6_bus &spi6_cs_func>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 13 &pdma0 12>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_12: hsi2c@10900000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10900000 0xc0>;
+			interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c12_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_6: usi@109100c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109100c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1004>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_13: hsi2c@10910000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10910000 0xc0>;
+			interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c13_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_7: usi@109200c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109200c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1008>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_7: serial@10920000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10920000 0xc0>;
+			interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart7_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_7: spi@10920000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10920000 0x30>;
+			interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi7_bus &spi7_cs_func>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 15 &pdma0 14>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_14: hsi2c@10920000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10920000 0xc0>;
+			interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c14_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_7: usi@109300c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109300c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x100c>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_15: hsi2c@10930000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10930000 0xc0>;
+			interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c15_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_8: usi@109400c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109400c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1010>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_8: serial@10940000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10940000 0xc0>;
+			interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart8_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_8: spi@10940000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10940000 0x30>;
+			interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi8_bus &spi8_cs_func>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 17 &pdma0 16>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_16: hsi2c@10940000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10940000 0xc0>;
+			interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c16_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_8: usi@109500c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109500c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1014>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_17: hsi2c@10950000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10950000 0xc0>;
+			interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c17_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_9: usi@109600c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109600c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1018>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_9: serial@10960000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10960000 0xc0>;
+			interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart9_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_9: spi@10960000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10960000 0x30>;
+			interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi9_bus &spi9_cs_func>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 19 &pdma0 18>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_18: hsi2c@10960000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10960000 0xc0>;
+			interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c18_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_9: usi@109700c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109700c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x101c>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_19: hsi2c@10970000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10970000 0xc0>;
+			interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c19_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_10: usi@109800c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109800c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1020>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_10: serial@10980000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x10980000 0xc0>;
+			interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart10_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_10: spi@10980000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x10980000 0x30>;
+			interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi10_bus &spi10_cs_func>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			dmas = <&pdma0 21 &pdma0 20>;
+			dma-names = "tx", "rx";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_20: hsi2c@10980000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10980000 0xc0>;
+			interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c20_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_10: usi@109900c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109900c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1024>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_21: hsi2c@10990000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x10990000 0xc0>;
+			interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c21_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_11: usi@109a00c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109a00c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x1028>;
+		samsung,mode = <USI_V2_UART>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: UART */
+		serial_11: serial@109a0000 {
+			compatible = "samsung,exynos850-uart";
+			reg = <0x109a0000 0xc0>;
+			interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart11_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
+			clock-names = "uart", "clk_uart_baud0";
+			samsung,uart-fifosize = <64>;
+			status = "disabled";
+		};
+
+		/* USI: SPI */
+		spi_11: spi@109a0000 {
+			compatible = "samsung,exynosautov9-spi";
+			reg = <0x109a0000 0x30>;
+			interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi11_bus &spi11_cs_func>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
+			clock-names = "spi", "spi_busclk0", "spi_ioclk";
+			samsung,spi-src-clk = <0>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		/* USI: I2C */
+		hsi2c_22: hsi2c@109a0000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x109a0000 0xc0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c22_bus>;
+			interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	usi_i2c_11: usi@109b00c0 {
+		compatible = "samsung,exynos850-usi";
+		reg = <0x109b00c0 0x20>;
+		samsung,sysreg = <&syscon_peric1 0x102c>;
+		samsung,mode = <USI_V2_I2C>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>,
+			 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>;
+		clock-names = "pclk", "ipclk";
+		status = "disabled";
+
+		/* USI: I2C */
+		hsi2c_23: hsi2c@109b0000 {
+			compatible = "samsung,exynosautov9-hsi2c";
+			reg = <0x109b0000 0xc0>;
+			interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hsi2c23_bus>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>;
+			clock-names = "hsi2c", "hsi2c_pclk";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+	};
+};