From patchwork Wed Jun 29 15:59:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12900362 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6831AC433EF for ; Wed, 29 Jun 2022 16:11:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zq1BWuFijMchQTtWJe2scZm+oFe0/g4FRZkT/KZDjms=; b=abcYu0DhhW13Y2 GR3qElp1DSU8NMrzSTEnnFG6wUm1HuPYUj8Rwm7/kVpja9vbBrWyXPJ3wnTMWqzPgoqYDknilHuUM nV7ac6wc6mwxmzXrUE84VaKFXHLoy80Ejblszy/HMEpcIciA/9Zzk5u2tl5gLAOARIcM47kqH28YA avppFtu5kmnKGRtw4372TzwniGZC2UhUENHFfD8m0/Olk/YuomAiNoIXv+mCYny/Qj4LBmmg9odR3 9flsbPIofOwJgQeRiH7YKOtkz93XTx0LK8wALci/0PtcxkVYAbVPNBjQpUK0kCv3JRMrKRMp/YWQ7 a+mmqo3MSRQa1BXZfGqA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6aGZ-00Ctvy-03; Wed, 29 Jun 2022 16:10:11 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6a7B-00CogX-P5; Wed, 29 Jun 2022 16:00:31 +0000 Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 692CD660198D; Wed, 29 Jun 2022 17:00:27 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656518428; bh=etvqQ1Sf4L9KOJ6PfLg/qIPZJ2SbAA+l1UyPzPWGVwY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vp86zMw2GSlDu1PAFaueC5lnum0u0hTa4z3UyfBNZDukkMJJnem88oC876mYn+2TP ob9W5WbSl0j237TWLhuN2RXo7IDzA5pQhTGJLWba2FrqQqekpRsV7RPlgF3wGF+PPS V14L4WzyEPibYHKM5/ShK6sp2PwEW8EB0x+cz2idB0kC0/wdSRSn1skW6RlvpbsO5i N3G09TpbZ1h0EjWdrOvpQ9rvmZaoeQEK9AbR6zh9UIoueBG/rjFggRLSk16tIx5q1V mfttr/sLp8bVGga4vW5c3mAiQxYso0bWbL0+tk95f2shNXYgXJIE97CDTwjbgCQOt5 hwmcC3ZuCoBMg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 17/19] arm64: dts: mediatek: asurada: Enable MMC Date: Wed, 29 Jun 2022 11:59:54 -0400 Message-Id: <20220629155956.1138955-18-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220629155956.1138955-1-nfraprado@collabora.com> References: <20220629155956.1138955-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220629_090030_159126_917BC324 X-CRM114-Status: GOOD ( 12.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable both MMC controllers present on Asurada. MMC0 is for non-removable internal memory, while MMC1 is an SD card slot. MMC1 isn't used on all machines, but in those cases the CD interrupt is never triggered and thus it is basically as if it was disabled. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v4: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 149 ++++++++++++++++++ 1 file changed, 149 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index d56c73e37633..7b89f6e552c5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -170,6 +170,46 @@ &i2c7 { pinctrl-0 = <&i2c7_pins>; }; +&mmc0 { + status = "okay"; + + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_default_pins>; + pinctrl-1 = <&mmc0_uhs_pins>; + bus-width = <8>; + max-frequency = <200000000>; + vmmc-supply = <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply = <&mt6359_vufs_ldo_reg>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + supports-cqe; + cap-mmc-hw-reset; + mmc-hs400-enhanced-strobe; + hs400-ds-delay = <0x12814>; + no-sdio; + no-sd; + non-removable; +}; + +&mmc1 { + status = "okay"; + + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_default_pins>; + pinctrl-1 = <&mmc1_uhs_pins>; + bus-width = <4>; + max-frequency = <200000000>; + cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>; + vmmc-supply = <&mt6360_ldo5_reg>; + vqmmc-supply = <&mt6360_ldo3_reg>; + cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + no-sdio; + no-mmc; +}; + /* for CORE */ &mt6359_vgpu11_buck_reg { regulator-always-on; @@ -503,6 +543,115 @@ pins-bus { }; }; + mmc0_default_pins: mmc0-default-pins { + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = <8>; + bias-pull-up = ; + }; + + pins-clk { + pinmux = ; + drive-strength = <8>; + bias-pull-down = ; + }; + + pins-rst { + pinmux = ; + drive-strength = <8>; + bias-pull-down = ; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = <10>; + bias-pull-up = ; + }; + + pins-clk { + pinmux = ; + drive-strength = <10>; + bias-pull-down = ; + }; + + pins-rst { + pinmux = ; + drive-strength = <8>; + bias-pull-down = ; + }; + + pins-ds { + pinmux = ; + drive-strength = <10>; + bias-pull-down = ; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + pins-cmd-dat { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = <8>; + bias-pull-up = ; + }; + + pins-clk { + pinmux = ; + drive-strength = <8>; + bias-pull-down = ; + }; + + pins-insert { + pinmux = ; + input-enable; + bias-pull-up; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + pins-cmd-dat { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = <8>; + bias-pull-up = ; + }; + + pins-clk { + pinmux = ; + input-enable; + drive-strength = <8>; + bias-pull-down = ; + }; + }; + pcie_pins: pcie-default-pins { pins-pcie-wake { pinmux = ;