From patchwork Thu Jun 30 08:36:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Murzin X-Patchwork-Id: 12901421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A42AC433EF for ; Thu, 30 Jun 2022 08:38:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Y0CrUsK9C/uQELPVD1y2m2euTqj7iIGilbAHOdjoYsw=; b=vmyAOb4D+OHP15 tkvoIkuuZoxLGkSiRGl3X7YI9s20S7EFdmNFn/k5687uRjHV1eRGkO1N0k5chcj8SncgQ715wpzGc jvpdxDZp2JPAso0She4ZGzFDd/yxQfdsJ6BLI5yhM0ORXFSiCLluFFAl72rl7b91AannsVcNYVsH9 tFDUJx33GshcS/7PKZCDte4P+iPyTvp3x+rLchqNSMVkighKe5Rj+KVwVxzNEhHhZNy7aqMEaIl9Q ibykOiwYrF+BkE3Qfz4WfH2m132tKpd/j5nGlcOfghZMkx2y3l7fqHxX96ErJk0b91LFWyOdBUgXr oHaQqJ5ovG/7dSgA3mrw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6pgN-00G3fq-IV; Thu, 30 Jun 2022 08:37:51 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6pfc-00G3RV-7u for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2022 08:37:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A6291BF3; Thu, 30 Jun 2022 01:37:02 -0700 (PDT) Received: from login2.euhpc.arm.com (login2.euhpc.arm.com [10.6.27.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 65C503F66F; Thu, 30 Jun 2022 01:37:01 -0700 (PDT) From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org Cc: arnd@arndb.de, ayan.kumar.halder@xilinx.com, stefanos@xilinx.com Subject: [RFC PATCH 3/3] ARM: Introduce MPS3 AN536 Date: Thu, 30 Jun 2022 09:36:41 +0100 Message-Id: <20220630083641.21835-4-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20220630083641.21835-1-vladimir.murzin@arm.com> References: <20220630083641.21835-1-vladimir.murzin@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_013704_485450_F608D85F X-CRM114-Status: GOOD ( 17.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Application Note 536 FPGA image implements the dual Cortex-R52 system which is extended with interconnect and peripherals to provide an example design. Unfortunately, design does't support exclusive access to shareable memory which is show stopper for SMP support - we enforce shareable attribute via MPU. Signed-off-by: Vladimir Murzin --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/mps3-an536.dts | 135 +++++++++++++++++++++++++++++ arch/arm/mach-versatile/Kconfig | 27 ++++-- arch/arm/mach-versatile/v2m-mps2.c | 3 +- 4 files changed, 160 insertions(+), 8 deletions(-) create mode 100644 arch/arm/boot/dts/mps3-an536.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5112f493f494..831401e5d021 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -400,7 +400,8 @@ dtb-$(CONFIG_ARCH_MMP) += \ mmp3-dell-ariel.dtb dtb-$(CONFIG_ARCH_MPS2) += \ mps2-an385.dtb \ - mps2-an399.dtb + mps2-an399.dtb \ + mps3-an536.dtb dtb-$(CONFIG_ARCH_MOXART) += \ moxart-uc7112lx.dtb dtb-$(CONFIG_ARCH_SD5203) += \ diff --git a/arch/arm/boot/dts/mps3-an536.dts b/arch/arm/boot/dts/mps3-an536.dts new file mode 100644 index 000000000000..240c5bb46471 --- /dev/null +++ b/arch/arm/boot/dts/mps3-an536.dts @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 or MIT +/* + * Copyright (c) 2022, Arm Limited. All rights reserved. + * + * Author: Vladimir Murzin + */ + +#include + +/dts-v1/; + + +/ { + model = "ARM MPS3 Application Note 536"; + compatible = "arm,mps3","arm,mps2"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0>; + }; + }; + + memory@20000000 { + device_type = "memory"; + reg = <0x20000000 0x20000000>; + }; + + clk-osc0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + sysclk: clk-osc1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + + gic: interrupt-controller@f0000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xf0000000 0x10000>, // GICD + <0xf0100000 0x40000>; // GICR + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + ; + interrupt-names = "phys", "virt"; + }; + + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart0: serial@e0205000 { + compatible = "arm,mps2-uart"; + reg = <0xe0205000 0x1000>; + interrupts = , + , + ; + clocks = <&sysclk>; + }; + + uart1: serial@e0206000 { + compatible = "arm,mps2-uart"; + reg = <0xe0206000 0x1000>; + interrupts = , + , + ; + clocks = <&sysclk>; + }; + + }; + + fpga@e0200000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xe0200000 0x3000>; + + fpgaio@2000 { + compatible = "syscon", "simple-mfd"; + reg = <0x2000 0x10>; + ranges = <0x0 0x2000 0x10>; + #address-cells = <1>; + #size-cells = <1>; + + led0,0 { + compatible = "register-bit-led"; + reg = <0x00 0x04>; + offset = <0x00>; + mask = <0x01>; + label = "userled:0"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led0,1 { + compatible = "register-bit-led"; + reg = <0x00 0x04>; + offset = <0x00>; + mask = <0x02>; + label = "userled:1"; + linux,default-trigger = "usr"; + default-state = "off"; + }; + }; + }; +}; diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig index 18643af4f3e1..94c26bd7d3b9 100644 --- a/arch/arm/mach-versatile/Kconfig +++ b/arch/arm/mach-versatile/Kconfig @@ -327,19 +327,21 @@ config ARCH_VEXPRESS_TC2_PM endif menuconfig ARCH_MPS2 - bool "ARM MPS2 family" - depends on ARM_SINGLE_ARMV7M + bool "ARM MPS2/MPS3 family" + depends on ARM_SINGLE_ARMV7M || ARM_SINGLE_ARMV7R select ARM_AMBA select CLKSRC_MPS2 help - Support for Cortex-M Prototyping System (or V2M-MPS2) which comes - with a range of available cores like Cortex-M3/M4/M7. + Support for ARM MPS2/MPS3 paltform which comes with a range + of available cores from Cortex-M and Cortex-R families. - Please, note that depends which Application Note is used memory map - for the platform may vary, so adjustment of RAM base might be needed. + Please, note that depends which Application Note is used memory map + for the platform may vary, so adjustment of RAM base might be needed. if ARCH_MPS2 +if ARM_SINGLE_ARMV7M + config MACH_MPS2_AN385 bool "ARM MPS2 Application Note 385" default y @@ -356,4 +358,17 @@ config MACH_MPS2_AN400 bool "ARM MPS2 Application Note 400" default y +endif # ARMv7-M + +if ARM_SINGLE_ARMV7R + +config MACH_MPS3_AN536 + bool "ARM MPS3 Application Note 536" + default y + select ARM_GIC_V3 + select HAVE_ARM_ARCH_TIMER + +endif # ARMv7-R + + endif # MPS2 diff --git a/arch/arm/mach-versatile/v2m-mps2.c b/arch/arm/mach-versatile/v2m-mps2.c index 5b50d8e95cd7..3a6c3bdfefd0 100644 --- a/arch/arm/mach-versatile/v2m-mps2.c +++ b/arch/arm/mach-versatile/v2m-mps2.c @@ -9,9 +9,10 @@ static const char *const mps2_compat[] __initconst = { "arm,mps2", + "arm,mps3", NULL }; -DT_MACHINE_START(MPS2DT, "MPS2 (Device Tree Support)") +DT_MACHINE_START(MPS2DT, "MPS2/MPS3 (Device Tree Support)") .dt_compat = mps2_compat, MACHINE_END