From patchwork Sat Jul 9 08:48:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 12912128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9320CC433EF for ; Sat, 9 Jul 2022 08:58:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=CcQ5CdILRaEYFOSmOy3z6WKvUZszaUWjpswDYjuVrB0=; b=kFrdgtBcaykN39 u8VvCOSGzyzVc/Ny2ApDr4ezpn7F9rxMvLgLO01zaM/M5U6nHYQUgX8L9j3kWagoupAL10jDhFBk6 5amJMczRc3uP1GnRLhFr2+VvBhdVHBI+fEtgbHpJNFoCDgAK4xtYIdXrEdNlvJ/aAt4wid5w+iBip 2wbK5ketBGOR24P80ZvZ/iExp8ZRiAIOac9tSOhfVyVdrHkw+3b5wbk7Jkob03te/dYVI61dfQvvR nJZm5rjaeHwgRPpMaV9a/wCfAppUToO2bl+XSW+iAIrp06swzzTxknLPW18tXKkPbymms63AXyV4e UrmspKinVzAfvo8TC7pg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oA6HG-007Osl-V1; Sat, 09 Jul 2022 08:57:27 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oA6HE-007OsQ-OC for linux-arm-kernel@lists.infradead.org; Sat, 09 Jul 2022 08:57:25 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 17F7F60AB2; Sat, 9 Jul 2022 08:57:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 91E53C3411C; Sat, 9 Jul 2022 08:57:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657357042; bh=WrK+932CnJxu9v8WAmxUaGWCfO5YJRZCEWjawDqYnT0=; h=From:To:Cc:Subject:Date:From; b=mKeXIv7o37yXwjHMETf9VMo+OdKNjBMlaziF3eTXegwp8iyRlMY82aBekCt1x3krB HCfnlt0NT2HuYIxSoyDVSBzkkZKi3n3SfjC1UBMV7pcCk0MtuQmchxb1G+4dGmIXYq upBHs5aar6mp6uwfhbzyuD+AEkYXK6ZO7rDdt+1balPmGlKjiXpSZuto4Cd+JnYh7J mV02M14kUsg4GmoOec2tI96vosRTsGgIE3zEZsmLKpdVmIC/dGVyp+kmneMJytUReq yxWVEPE+JIXV71VjsKnWdpWpOrUdym8RW3V39Skaql3rNPwj9qOtRXPCSnclRfFP/i 7aoVLck14g6qA== From: Jisheng Zhang To: Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: save movk instructions in mov_q when the lower 16|32 bits are all zero Date: Sat, 9 Jul 2022 16:48:30 +0800 Message-Id: <20220709084830.3124-1-jszhang@kernel.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220709_015724_864911_B8FCF95D X-CRM114-Status: GOOD ( 11.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently mov_q is used to move a constant into a 64-bit register, when the lower 16 or 32bits of the constant are all zero, the mov_q emits one or two useless movk instructions. If the mov_q macro is used in hot code path, we want to save the movk instructions as much as possible. For example, when CONFIG_ARM64_MTE is 'Y' and CONFIG_KASAN_HW_TAGS is 'N', the following code in __cpu_setup() routine is the pontential optimization target: /* set the TCR_EL1 bits */ mov_q x10, TCR_MTE_FLAGS Before the patch: mov x10, #0x10000000000000 movk x10, #0x40, lsl #32 movk x10, #0x0, lsl #16 movk x10, #0x0 After the patch: mov x10, #0x10000000000000 movk x10, #0x40, lsl #32 Signed-off-by: Jisheng Zhang --- arch/arm64/include/asm/assembler.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 8c5a61aeaf8e..09f408424cae 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -568,9 +568,13 @@ alternative_endif movz \reg, :abs_g3:\val movk \reg, :abs_g2_nc:\val .endif + .if ((((\val) >> 16) & 0xffff) != 0) movk \reg, :abs_g1_nc:\val .endif + .endif + .if (((\val) & 0xffff) != 0) movk \reg, :abs_g0_nc:\val + .endif .endm /*