Message ID | 20220726143853.23709-3-wei.fang@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add the fec node on i.MX8ULP platform | expand |
On Wed, Jul 27, 2022 at 12:38:52AM +1000, wei.fang@nxp.com wrote: > From: Wei Fang <wei.fang@nxp.com> > > Add the fec support on i.MX8ULP platforms. > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> > --- > V2 change: > Remove the external clocks which is related to specific board. > V3 change: > No change. > V4 Change: > Add Reviewed-by tag. > --- > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > index 60c1b018bf03..3e8a1e4f0fc2 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -16,6 +16,7 @@ / { > #size-cells = <2>; > > aliases { > + ethernet0 = &fec; > gpio0 = &gpiod; > gpio1 = &gpioe; > gpio2 = &gpiof; > @@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 { > bus-width = <4>; > status = "disabled"; > }; > + > + fec: ethernet@29950000 { > + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; Since imx8ulp-fec is compatible with imx6ul-fec, what's the point of having imx6q-fec in there? It can be dropped, I guess? Shawn > + reg = <0x29950000 0x10000>; > + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "int0"; > + fsl,num-tx-queues = <1>; > + fsl,num-rx-queues = <1>; > + status = "disabled"; > + }; > }; > > gpioe: gpio@2d000080 { > -- > 2.25.1 >
> -----Original Message----- > From: Shawn Guo <shawnguo@kernel.org> > Sent: 2022年8月17日 17:47 > To: Wei Fang <wei.fang@nxp.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > s.hauer@pengutronix.de; netdev@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; kernel@pengutronix.de; festevam@gmail.com; > dl-linux-imx <linux-imx@nxp.com>; Peng Fan <peng.fan@nxp.com>; Jacky Bai > <ping.bai@nxp.com>; sudeep.holla@arm.com; > linux-arm-kernel@lists.infradead.org; Aisheng Dong <aisheng.dong@nxp.com> > Subject: Re: [PATCH V4 2/3] arm64: dts: imx8ulp: Add the fec support > > On Wed, Jul 27, 2022 at 12:38:52AM +1000, wei.fang@nxp.com wrote: > > From: Wei Fang <wei.fang@nxp.com> > > > > Add the fec support on i.MX8ULP platforms. > > > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > > Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> > > --- > > V2 change: > > Remove the external clocks which is related to specific board. > > V3 change: > > No change. > > V4 Change: > > Add Reviewed-by tag. > > --- > > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > index 60c1b018bf03..3e8a1e4f0fc2 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > @@ -16,6 +16,7 @@ / { > > #size-cells = <2>; > > > > aliases { > > + ethernet0 = &fec; > > gpio0 = &gpiod; > > gpio1 = &gpioe; > > gpio2 = &gpiof; > > @@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 { > > bus-width = <4>; > > status = "disabled"; > > }; > > + > > + fec: ethernet@29950000 { > > + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", > > +"fsl,imx6q-fec"; > > Since imx8ulp-fec is compatible with imx6ul-fec, what's the point of having > imx6q-fec in there? It can be dropped, I guess? > Actually, I did drop this in version 1. But when I added the imx8ulp compatible property to the fsl,fec.yaml, the maintainer expected imx8ulp to be compatible with imx6ul and with imx6q. The patch of fsl,fec.yaml as follows: --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -58,6 +58,11 @@ properties: - fsl,imx8qxp-fec - const: fsl,imx8qm-fec - const: fsl,imx6sx-fec + - items: + - enum: + - fsl,imx8ulp-fec + - const: fsl,imx6ul-fec + - const: fsl,imx6q-fec For compliant with the fsl,fec.yaml, so I added the imx6q-fec in the later version. And the patch of the fsl,fec.yaml has already applied to the upstream kernel. Therefore, I think it does not matter if the imx6q-fec is added. > Shawn > > > + reg = <0x29950000 0x10000>; > > + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "int0"; > > + fsl,num-tx-queues = <1>; > > + fsl,num-rx-queues = <1>; > > + status = "disabled"; > > + }; > > }; > > > > gpioe: gpio@2d000080 { > > -- > > 2.25.1 > >
On Wed, Jul 27, 2022 at 12:38:52AM +1000, wei.fang@nxp.com wrote: > From: Wei Fang <wei.fang@nxp.com> > > Add the fec support on i.MX8ULP platforms. > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Applied, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 60c1b018bf03..3e8a1e4f0fc2 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -16,6 +16,7 @@ / { #size-cells = <2>; aliases { + ethernet0 = &fec; gpio0 = &gpiod; gpio1 = &gpioe; gpio2 = &gpiof; @@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 { bus-width = <4>; status = "disabled"; }; + + fec: ethernet@29950000 { + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x29950000 0x10000>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0"; + fsl,num-tx-queues = <1>; + fsl,num-rx-queues = <1>; + status = "disabled"; + }; }; gpioe: gpio@2d000080 {