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Mon, 29 Aug 2022 09:14:52 -0400 (EDT) From: Maxime Ripard To: Maxime Ripard , Ben Skeggs , David Airlie , Chen-Yu Tsai , Thomas Zimmermann , Jani Nikula , Lyude Paul , Philipp Zabel , Maarten Lankhorst , Rodrigo Vivi , Tvrtko Ursulin , Jernej Skrabec , Samuel Holland , Karol Herbst , =?utf-8?q?Noralf_Tr=C3=B8nnes?= , Emma Anholt , Daniel Vetter , Joonas Lahtinen Cc: Maxime Ripard , Hans de Goede , linux-arm-kernel@lists.infradead.org, Phil Elwell , intel-gfx@lists.freedesktop.org, Dave Stevenson , dri-devel@lists.freedesktop.org, Dom Cobley , linux-kernel@vger.kernel.org, nouveau@lists.freedesktop.org, linux-sunxi@lists.linux.dev, Mateusz Kwiatkowski , Geert Uytterhoeven Subject: [PATCH v2 26/41] drm/vc4: vec: Refactor VEC TV mode setting Date: Mon, 29 Aug 2022 15:11:40 +0200 Message-Id: <20220728-rpi-analog-tv-properties-v2-26-459522d653a7@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728-rpi-analog-tv-properties-v2-0-459522d653a7@cerno.tech> References: <20220728-rpi-analog-tv-properties-v2-0-459522d653a7@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-65ba7 X-Developer-Signature: v=1; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Mateusz Kwiatkowski Change the mode_set function pointer logic to declarative config0, config1 and custom_freq fields, to make TV mode setting logic more concise and uniform. Signed-off-by: Mateusz Kwiatkowski Signed-off-by: Maxime Ripard Reviewed-by: Noralf Trønnes diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c index 72eee0cbb615..9a37c3fcc295 100644 --- a/drivers/gpu/drm/vc4/vc4_vec.c +++ b/drivers/gpu/drm/vc4/vc4_vec.c @@ -194,7 +194,9 @@ enum vc4_vec_tv_mode_id { struct vc4_vec_tv_mode { const struct drm_display_mode *mode; - void (*mode_set)(struct vc4_vec *vec); + u32 config0; + u32 config1; + u32 custom_freq; }; static const struct debugfs_reg32 vec_regs[] = { @@ -224,34 +226,6 @@ static const struct debugfs_reg32 vec_regs[] = { VC4_REG32(VEC_DAC_MISC), }; -static void vc4_vec_ntsc_mode_set(struct vc4_vec *vec) -{ - struct drm_device *drm = vec->connector.dev; - int idx; - - if (!drm_dev_enter(drm, &idx)) - return; - - VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN); - VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS); - - drm_dev_exit(idx); -} - -static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec) -{ - struct drm_device *drm = vec->connector.dev; - int idx; - - if (!drm_dev_enter(drm, &idx)) - return; - - VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD); - VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS); - - drm_dev_exit(idx); -} - static const struct drm_display_mode ntsc_mode = { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500, 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0, @@ -259,37 +233,6 @@ static const struct drm_display_mode ntsc_mode = { DRM_MODE_FLAG_INTERLACE) }; -static void vc4_vec_pal_mode_set(struct vc4_vec *vec) -{ - struct drm_device *drm = vec->connector.dev; - int idx; - - if (!drm_dev_enter(drm, &idx)) - return; - - VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD); - VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS); - - drm_dev_exit(idx); -} - -static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec) -{ - struct drm_device *drm = vec->connector.dev; - int idx; - - if (!drm_dev_enter(drm, &idx)) - return; - - VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD); - VEC_WRITE(VEC_CONFIG1, - VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ); - VEC_WRITE(VEC_FREQ3_2, 0x223b); - VEC_WRITE(VEC_FREQ1_0, 0x61d1); - - drm_dev_exit(idx); -} - static const struct drm_display_mode pal_mode = { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500, 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0, @@ -300,19 +243,24 @@ static const struct drm_display_mode pal_mode = { static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = { [VC4_VEC_TV_MODE_NTSC] = { .mode = &ntsc_mode, - .mode_set = vc4_vec_ntsc_mode_set, + .config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN, + .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, [VC4_VEC_TV_MODE_NTSC_J] = { .mode = &ntsc_mode, - .mode_set = vc4_vec_ntsc_j_mode_set, + .config0 = VEC_CONFIG0_NTSC_STD, + .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, [VC4_VEC_TV_MODE_PAL] = { .mode = &pal_mode, - .mode_set = vc4_vec_pal_mode_set, + .config0 = VEC_CONFIG0_PAL_BDGHI_STD, + .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, [VC4_VEC_TV_MODE_PAL_M] = { .mode = &pal_mode, - .mode_set = vc4_vec_pal_m_mode_set, + .config0 = VEC_CONFIG0_PAL_BDGHI_STD, + .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ, + .custom_freq = 0x223b61d1, }, }; @@ -470,7 +418,16 @@ static void vc4_vec_encoder_enable(struct drm_encoder *encoder, /* Mask all interrupts. */ VEC_WRITE(VEC_MASK0, 0); - vec->tv_mode->mode_set(vec); + VEC_WRITE(VEC_CONFIG0, vec->tv_mode->config0); + VEC_WRITE(VEC_CONFIG1, vec->tv_mode->config1); + + if (vec->tv_mode->custom_freq != 0) { + VEC_WRITE(VEC_FREQ3_2, + (vec->tv_mode->custom_freq >> 16) & + 0xffff); + VEC_WRITE(VEC_FREQ1_0, + vec->tv_mode->custom_freq & 0xffff); + } VEC_WRITE(VEC_DAC_MISC, VEC_DAC_MISC_VID_ACT | VEC_DAC_MISC_DAC_RST_N);