From patchwork Tue Aug 2 23:42:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "ishii.shuuichir@fujitsu.com" X-Patchwork-Id: 12935100 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB0A1C00140 for ; Tue, 2 Aug 2022 23:43:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=7C15WA0GZrcyDvkpCop1jcjnlfPy+8MA9DtawACsZgQ=; b=ry2m6NsZ2t/rze ijGj5tuFGIw4JEK1DfjwLU1afH7uCzN1u7EuDqVwaFXI4q7A8PoyHlZOnKOb5lAjf8YIwDxZrRFXH HhN/XrebZDJcxjEOmagAYQpZvtV5y6FS5g5aEhQVQtJaxXT3e9jIaYwC6JGWWBGAFg5ugqjJROrWm GF5REfLuMfF/Q7GccoQigmzGBlo1VRt7ffg67c+u7JxCBlCbqc1YdgQ5RRR/2EuoAJiDzcgp+JxWe zH4TgYzhN59tVw66AZW6Nau7vI2gEV2rCX+yrZdyiCpXkzx4zYJB3FwiK2aJOAkBcT9Rg6XVrh/YQ D67yMiMI3vbUh41wEKsw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oJ1X7-000jPA-Mv; Tue, 02 Aug 2022 23:42:41 +0000 Received: from esa4.hc1455-7.c3s2.iphmx.com ([68.232.139.117]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oJ1X3-000jLW-M2 for linux-arm-kernel@lists.infradead.org; Tue, 02 Aug 2022 23:42:39 +0000 X-IronPort-AV: E=McAfee;i="6400,9594,10427"; a="83032166" X-IronPort-AV: E=Sophos;i="5.93,212,1654527600"; d="scan'208";a="83032166" Received: from unknown (HELO yto-r3.gw.nic.fujitsu.com) ([218.44.52.219]) by esa4.hc1455-7.c3s2.iphmx.com with ESMTP; 03 Aug 2022 08:42:24 +0900 Received: from yto-m4.gw.nic.fujitsu.com (yto-nat-yto-m4.gw.nic.fujitsu.com [192.168.83.67]) by yto-r3.gw.nic.fujitsu.com (Postfix) with ESMTP id 2C84ED5029 for ; Wed, 3 Aug 2022 08:42:23 +0900 (JST) Received: from oym-om1.fujitsu.com (oym-om1.o.css.fujitsu.com [10.85.58.161]) by yto-m4.gw.nic.fujitsu.com (Postfix) with ESMTP id 68E9314470 for ; Wed, 3 Aug 2022 08:42:22 +0900 (JST) Received: from cn-r05-10.example.com (n3235113.np.ts.nmh.cs.fujitsu.co.jp [10.123.235.113]) by oym-om1.fujitsu.com (Postfix) with ESMTP id 2E26F4008A7C3; Wed, 3 Aug 2022 08:42:22 +0900 (JST) From: Shuuichirou Ishii To: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, thunder.leizhen@huawei.com, jgg@ziepe.ca, tglx@linutronix.de, chenxiang66@hisilicon.com, christophe.jaillet@wanadoo.fr, john.garry@huawei.com, baolu.lu@linux.intel.com, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: ishii.shuuichir@fujitsu.com Subject: [PATCH] iommu/arm-smmu-v3: fixed check process for disable_bypass module parameter Date: Wed, 3 Aug 2022 08:42:07 +0900 Message-Id: <20220802234207.1994093-1-ishii.shuuichir@fujitsu.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220802_164238_025074_DECCE0B1 X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The current process does not enable the bypass setting regardless of the value of the disable_bypass module parameter when ACPI is enabled, so the value of the disable_bypass module parameter has been corrected so that it is handled correctly. Signed-off-by: Shuuichirou Ishii --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 88817a3376ef..256d7b2a83a7 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3396,7 +3396,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) enables &= ~(CR0_EVTQEN | CR0_PRIQEN); /* Enable the SMMU interface, or ensure bypass */ - if (!bypass || disable_bypass) { + if (!bypass && disable_bypass) { enables |= CR0_SMMUEN; } else { ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT);