From patchwork Thu Aug 4 10:49:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12936260 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2CC2C19F2D for ; Thu, 4 Aug 2022 10:50:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GM0kB03lmHHguUi6l+h30nstHbJU/XDwp3U3fvMevLA=; b=xxKgKKgl0qZYfm WbFvxlJeT8tcO/dckLcFUi80VCFqma5mI8q1weS376JXiBPQ1E/IzL6QLNsY7v9oNqrFStfg9g6gW tuCU5xnN+r1ZKsDPqz2ADMjN5mWzjmjSwS/5W5qQZvY008Arcqfa8i2YMhu0G+ZysjQKE5uhyYFBC rvEqrdaFBOEZ1xo3hTPeOPi89EkXTaLpdHns7/BL9jsLqqbBm7pZsCL/IeOw1IWydpVgk6Ern3k4Z JJnfPxZsEFrPGV9Gdw4ASDJPCcpCmBAoSO8KTTCXzSJUa5CoSxJSShkTx8aSFPkUjD/UNpE+QMHlw RvhMuOGu3507euT7xS2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oJYQQ-005Ky6-Kw; Thu, 04 Aug 2022 10:49:58 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oJYPw-005Kou-U6 for linux-arm-kernel@lists.infradead.org; Thu, 04 Aug 2022 10:49:30 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 32529B8250E; Thu, 4 Aug 2022 10:49:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AB944C433D6; Thu, 4 Aug 2022 10:49:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659610165; bh=b9e6f7QyGeXEQipqkQe1Q41JGjIlUd+dl7sHDQm0Ydk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ehtn3dbiSEZXepJZAn3FacrPg3pc9uU+6q6kjcm/raUKTMxl3PoxhiY9EXpdQ1grx itl5BakRyuDs0t0bcSxYyoEKOWhHJAPByPjfSOT1M7XUdhExr/DKFyP45D2d774wyD ohWnrMSml9OWf8lxH327osU/Uxenulu9YI0UoW9/Z7jO/wEQlhBc4h9Sf2WN++sMuZ /V7EOL41yneTHrsH1Y0RluZ3c11cCTNbkoCDjUH5mtkNcPG9HjJEraVChr6oGUKlUt X4ilM3APNdpQBlm/hj4tUr1wZ2kOMU0UGI9son5UDfGb3QiDHx2A4qb6XSuqMZcumN Xy32oPprQ43qQ== Received: by pali.im (Postfix) id 2748AAC9; Thu, 4 Aug 2022 12:49:23 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Linus Walleij Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH 2/4] pinctrl: armada-37xx: Fix definitions for MPP pins 20-22 Date: Thu, 4 Aug 2022 12:49:13 +0200 Message-Id: <20220804104915.23719-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220804104915.23719-1-pali@kernel.org> References: <20220804104915.23719-1-pali@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220804_034929_138733_3996CE46 X-CRM114-Status: GOOD ( 12.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org All 3 MPP pins (20, 21 and 22) can be configured individually and also can be configured to GPIO functions. Fix definitions for these MPP pins in existing pin groups. After this change GPIO function can be enabled just for one of these 3 pins. Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Pali Rohár --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 2b44c634ccb5..e5e5f0ea0e77 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -213,9 +213,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"), - PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), - PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), - PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), + PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"), + PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12), + "ptp", "mii"), + PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13), + "ptp", "mii"), PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), "mii", "mii_err"), };